drivers: caam: add JR interrupt only if CFG_CAAM_ITR=y

Adding the JR interrupt in the OPTEE CAAM driver, even if not used in
OPTEE, prevents the Linux CAAM driver from using the JR interrupt on
plat

drivers: caam: add JR interrupt only if CFG_CAAM_ITR=y

Adding the JR interrupt in the OPTEE CAAM driver, even if not used in
OPTEE, prevents the Linux CAAM driver from using the JR interrupt on
platforms sharing the same line of interruption for all job rings.

To dequeue job from the job ring, the Linux CAAM driver would pull the
number of jobs done from the output ring slot full register.

The fix is to add the JR interrupt only if CFG_CAAM_ITR=y. This
allows the Linux CAAM driver to dequeue jobs faster than polling from
a register.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: caam: fix function definition when CFG_CAAM_NO_ITR=y

There is a bug in the CAAM JR interruption enablement logic. When
CFG_CAAM_NO_ITR=y, the JR interruptions are used and when
CFG_CAAM_NO_

drivers: caam: fix function definition when CFG_CAAM_NO_ITR=y

There is a bug in the CAAM JR interruption enablement logic. When
CFG_CAAM_NO_ITR=y, the JR interruptions are used and when
CFG_CAAM_NO_ITR=n, the JR interruptions are not used.

Even with this wrong logic, the CAAM is still able to enqueue jobs.
When no JR interruptions are received, the CAAM will manually dequeue
jobs from the jobring by checking the number of jobs done in the output
ring slots full register.

CAAM JR interruptions are not mandatory for the CAAM to work properly
but it makes the dequeuing faster than polling the output ring slot full
register.

To avoid confusion, replace CFG_CAAM_NO_ITR with CFG_CAAM_ITR. The
CFG_CAAM_ITR is enabled by default and platforms not using the JR
interruptions would have this flag disabled instead.

Fixes: 3f45afc31 ("drivers: caam: disable the use of interrupts for some platforms")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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get_maintainer.py: add OP-TEE mailing list(s) to --release-to

The release annoucements should be sent to the general OP-TEE mailing
list(s), in addition to the maintainers and reviewers. Add the nee

get_maintainer.py: add OP-TEE mailing list(s) to --release-to

The release annoucements should be sent to the general OP-TEE mailing
list(s), in addition to the maintainers and reviewers. Add the needed
bits to extract this information.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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ta: pkcs11: PKCS11_CKM_AES_CBC_PAD is not supported

Remove PKCS11_CKM_AES_CBC_PAD from the list of the supported mechanism
as it is not implemented by the TA.

Fixes: https://github.com/OP-TEE/optee

ta: pkcs11: PKCS11_CKM_AES_CBC_PAD is not supported

Remove PKCS11_CKM_AES_CBC_PAD from the list of the supported mechanism
as it is not implemented by the TA.

Fixes: https://github.com/OP-TEE/optee_os/issues/5142
Acked-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: Fix check for assigned-clock-rates index

Index should actually be strictly less than rate_len. Fix this which
might happen with the following description:

assigned-clock = <foo>, <bar

drivers: clk: Fix check for assigned-clock-rates index

Index should actually be strictly less than rate_len. Fix this which
might happen with the following description:

assigned-clock = <foo>, <bar>;
assigned-clock-parents = <foo_parent>, <bar_parent>;
assigned-clock-rates = <1000>;

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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core: dt_driver: allow parsing of phandle == 0

In Linux, it is allowed to specify a null phandle which means it should
be skipped. Add support for this specific case by simply skipping over
it. This

core: dt_driver: allow parsing of phandle == 0

In Linux, it is allowed to specify a null phandle which means it should
be skipped. Add support for this specific case by simply skipping over
it. This is needed to parse assigned-clock-parents which can use such
syntax. This is specified in the clock bindings [1] which says the
following:

To skip setting parent or rate of a clock its corresponding entry
should be set to 0, or can be omitted if it is not followed by any
non-zero entry

For example this is a valid device-tree description:

assigned-clocks = <foo>, <bar>;
assigned-clock-parents = <0> <bar_parent>;
assigned-clock-rates = <1000>;

Link: [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/clock/clock-bindings.txt
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: imx: dump TZASC state after lockdown

Call the TZASC configuration dump after the region lockdown.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.fo

drivers: imx: dump TZASC state after lockdown

Call the TZASC configuration dump after the region lockdown.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: imx: tzc380: register TZC380 memory registers

Register TZASC memory registers for TZASC and eventually TZASC2.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissi

drivers: imx: tzc380: register TZC380 memory registers

Register TZASC memory registers for TZASC and eventually TZASC2.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: tzc380: fix the lockdown range register value

This register controls the range of regions that are locked down.
The number of regions to lockdown are defined in [1]:
lockdown_range[3:0] and

drivers: tzc380: fix the lockdown range register value

This register controls the range of regions that are locked down.
The number of regions to lockdown are defined in [1]:
lockdown_range[3:0] and its value goes from b0000 to b1111.

If the goal of tzc_regions_lockdown() is to lock all regions supported
by the platforms, then the value of lockdown_range[3:0] should be equal
to no_of_regions[3:0] of the configuration register [2].

Currently, tzc.num_regions is used to defined the lockdown range which
is incorrect because it has been incremented during initialization.
Fix the issue by decrementing tzc.num_regions before the configuration
of lockdown_range[3:0].

Link: [1] https://developer.arm.com/documentation/ddi0431/c/programmers-model/register-descriptions/lockdown-range-register
Link: [2] https://developer.arm.com/documentation/ddi0431/c/programmers-model/register-descriptions/configuration-register
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: imx: add TZASC_SIZE for imx6, imx7 and imx8m

Add TZASC_SIZE value for all i.MX platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@lin

core: imx: add TZASC_SIZE for imx6, imx7 and imx8m

Add TZASC_SIZE value for all i.MX platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: fix use after free in tee_ta_open_session()

Fixes a use after free where the session pointer 's' was used after
tee_ta_close_session() while recovering from an error.

Fixes: 82061b8d7b34 ("co

core: fix use after free in tee_ta_open_session()

Fixes a use after free where the session pointer 's' was used after
tee_ta_close_session() while recovering from an error.

Fixes: 82061b8d7b34 ("core: store TA params in session struct")
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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MAINTAINERS: maintain the Xilinx Versal ACAP platform

Added Jorge Ramirez-Ortiz as maintainer.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.forissier@l

MAINTAINERS: maintain the Xilinx Versal ACAP platform

Added Jorge Ramirez-Ortiz as maintainer.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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ci: azure: add Versal ACAP platform support

Build Versal ACAP.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

plat-versal: add support for Xilinx's Versal ACAP platform

Initial support for the Versal ACAP validated on the AI Core Series VKC190
Evaluation Kit.

The following BIF file is used by bootgen to ge

plat-versal: add support for Xilinx's Versal ACAP platform

Initial support for the Versal ACAP validated on the AI Core Series VKC190
Evaluation Kit.

The following BIF file is used by bootgen to generate the Versal boot.bin
image.

the_ROM_image:
{
image {
{ type=bootimage, file=vpl_gen_fixed.pdi }
{ type=bootloader, file=plm.elf }
{ core=psm, file=psmfw.elf }
}

image {
id = 0x1c000000, name=apu_subsystem
{ type=raw, load=0x00001000, file=system.dtb }
{ core=a72-0, exception_level=el-3, trustzone, file=bl31.elf }
{ core=a72-0, exception_level=el-2, file=u-boot.elf }
{ core=a72-0, exception_level=el-1, trustzone, file=tee.elf }
}
}

$ ./bootgen -arch versal -image boot.bif -o BOOT.BIN

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: John Linn <linnj@xilinx.com>
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm32mp1: scmi: export some STPMIC1 regulators as voltage domains

Exposes STPMIC1 regulators through agent channel SCMI for platform
stm32mp1.

Acked-by: Jens Wiklander <jens.wiklander@linaro.o

plat-stm32mp1: scmi: export some STPMIC1 regulators as voltage domains

Exposes STPMIC1 regulators through agent channel SCMI for platform
stm32mp1.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt-bindings: stm32mp1: add IDs for STPMIC1 SCMI voltage regulators

Define the SCMI voltage domain IDs exposed by OP-TEE SCMI server on
stm32mp1.

Acked-by: Jens Wiklander <jens.wiklander@linar

core: dt-bindings: stm32mp1: add IDs for STPMIC1 SCMI voltage regulators

Define the SCMI voltage domain IDs exposed by OP-TEE SCMI server on
stm32mp1.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: stpmic1: export regulators API in a specific header file

Split stpmic1.h in 2 parts, one specifically for STPMIC1 regulator
interface.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

drivers: stpmic1: export regulators API in a specific header file

Split stpmic1.h in 2 parts, one specifically for STPMIC1 regulator
interface.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: imx_i2c: add support for MX8MP

Add I2C driver support for iMX8MP.

Signed-off-by: Vanessa Maegima <vanessa.maegima@foundries.io>
Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jo

drivers: imx_i2c: add support for MX8MP

Add I2C driver support for iMX8MP.

Signed-off-by: Vanessa Maegima <vanessa.maegima@foundries.io>
Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>

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mk/aosp_optee.mk: Provide the ability to set CROSS_COMPILE* variables

Provide the ability to set CROSS_COMPILE32/64 for AOSP build,
since those may differ among different compilers.

Acked-by: Jerom

mk/aosp_optee.mk: Provide the ability to set CROSS_COMPILE* variables

Provide the ability to set CROSS_COMPILE32/64 for AOSP build,
since those may differ among different compilers.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Andrii Chepurnyi <andrii_chepurnyi@epam.com>

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Introduce OPTEE_CLANG_COMPILER_PATH variable

AOSP comes with several prebuilt clang versions. Introduce
OPTEE_CLANG_COMPILER_PATH variable to be able to chose exact
clang toolchain.

Acked-by: Jerom

Introduce OPTEE_CLANG_COMPILER_PATH variable

AOSP comes with several prebuilt clang versions. Introduce
OPTEE_CLANG_COMPILER_PATH variable to be able to chose exact
clang toolchain.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Andrii Chepurnyi <andrii_chepurnyi@epam.com>

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mk/aosp_optee.mk: introduce OPTEE_EXTRA_TA_FLAGS variable

Introduce OPTEE_EXTRA_TA_FLAGS variable to be able to pass
additional variables/flags in case of TA AOSP build.

Acked-by: Jerome Forissier

mk/aosp_optee.mk: introduce OPTEE_EXTRA_TA_FLAGS variable

Introduce OPTEE_EXTRA_TA_FLAGS variable to be able to pass
additional variables/flags in case of TA AOSP build.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Andrii Chepurnyi <andrii_chepurnyi@epam.com>

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plat-stm32mp1: fix apb3/4 iomem static mapping

Fixes APB3 device memory mapping size and adds APB4 device memory to
core static mapping.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Sig

plat-stm32mp1: fix apb3/4 iomem static mapping

Fixes APB3 device memory mapping size and adds APB4 device memory to
core static mapping.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-vexpress: Use the correct MACRO for TPM2

Replace CFG_TPM2_MMIO with CFG_DRIVERS_TPM2_MMIO.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@l

plat-vexpress: Use the correct MACRO for TPM2

Replace CFG_TPM2_MMIO with CFG_DRIVERS_TPM2_MMIO.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: io: add {get/put}_unaligned_le{16/32/64}()

Add 16, 32 and 64 bits put/get functions for little endian
unaligned access

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Jen

core: io: add {get/put}_unaligned_le{16/32/64}()

Add 16, 32 and 64 bits put/get functions for little endian
unaligned access

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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MAINTAINERS: remove Sandeep (Broadcom ns3)

Sandeep's email bounces, therefore remove him from MAINTAINERS. Since
there is no reviewers left in the "Broadcom ns3" subsystem, change its
status from Ma

MAINTAINERS: remove Sandeep (Broadcom ns3)

Sandeep's email bounces, therefore remove him from MAINTAINERS. Since
there is no reviewers left in the "Broadcom ns3" subsystem, change its
status from Maintained to Orphan.

CC: Broadcom <bcm-optee-feedback-list.pdl@broadcom.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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