| 77571213 | 22-Dec-2022 |
Andrew Mustea <andrew.mustea@microsoft.com> |
scripts: checkpatch: allow git revision selections as arguments
- The git commands `git rev-parse` and `git rev-list` were added in version 2.19. - `git rev-parse` can parse revision names or any
scripts: checkpatch: allow git revision selections as arguments
- The git commands `git rev-parse` and `git rev-list` were added in version 2.19. - `git rev-parse` can parse revision names or any revision selection and return the corresponding git object name. This includes being able to parse commit ranges, specific hashes, branch names, git tags, etc. See 'https://git-scm.com/book/en/v2/Git-Tools-Revision-Selection' for more info. - If `git rev-parse` returns a range of git objects, `git rev-list` can convert it into a list of commit ids.
Signed-off-by: Andrew Mustea <andrew.mustea@microsoft.com>
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| 98c36268 | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: make stm32_rng_read() static
Reading a random number should be done via the generic API.
Makes stm32_rng_read() static as it is unused in other files and remove stm32_rng.h, whi
drivers: stm32_rng: make stm32_rng_read() static
Reading a random number should be done via the generic API.
Makes stm32_rng_read() static as it is unused in other files and remove stm32_rng.h, which is now empty.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 27f3087b | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: override plat_rng_init() if hardware RNG
Avoids useless operations by overriding plat_rng_init() and do nothing.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
drivers: stm32_rng: override plat_rng_init() if hardware RNG
Avoids useless operations by overriding plat_rng_init() and do nothing.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 3e64c635 | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: implement late seed error detection
As per STM32MP1x specification, rare seed error conditions must be considered when random value read from DR register is zero.
Signed-off-by:
drivers: stm32_rng: implement late seed error detection
As per STM32MP1x specification, rare seed error conditions must be considered when random value read from DR register is zero.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 29893549 | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: pm callbacks
Implements power management (suspend/resume) functions in stm32_rng driver.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Ca
drivers: stm32_rng: pm callbacks
Implements power management (suspend/resume) functions in stm32_rng driver.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 3c752300 | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: support clock error detection
Adds clock error detection configuration when the clock-error-detect property is set in the RNG node in the device tree.
Signed-off-by: Gatien Chev
drivers: stm32_rng: support clock error detection
Adds clock error detection configuration when the clock-error-detect property is set in the RNG node in the device tree.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 091ef005 | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: support conditional reset
Implements a RNG variant error concealment named conditional reset that requires a software sequence before RNG being able to deliver again random bytes
drivers: stm32_rng: support conditional reset
Implements a RNG variant error concealment named conditional reset that requires a software sequence before RNG being able to deliver again random bytes. It is supported by STM32MP13
RNG peripherals that are supporting conditional reset can dynamically customize their configuration. Adds support for RNG clock frequency restraint and NIST configuration.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 6a6b6168 | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: call conceal_seed_error() on error cases
Changes conceal_seed_error() implementation to be called only upon error conditions. This change will ease next integration of STM32MP13
drivers: stm32_rng: call conceal_seed_error() on error cases
Changes conceal_seed_error() implementation to be called only upon error conditions. This change will ease next integration of STM32MP13 variant error concealment implementation.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 0817aa6f | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: cleanup and change sample read timeout to 10ms
10ms timeout is sufficient when reading samples from RNG subsystem when log level is below TRACE_FLOW log level. This changes renam
drivers: stm32_rng: cleanup and change sample read timeout to 10ms
10ms timeout is sufficient when reading samples from RNG subsystem when log level is below TRACE_FLOW log level. This changes renames the timeout value macro to RNG_READY_TIMEOUT_US.
This change also renames the reset timeout value for clarity, from RNG_TIMEOUT_US_1MS to RNG_RESET_TIMEOUT_US.
Moves RNG_FIFO_BYTE_DEPTH macro definition to source file beginning. Uses U() macro to define IOMEM registers offsets.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f63f11bd | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: keep rng enable from initialization
Changes stm32_rng driver implementation to keep RNG running and only gate the access bus clock when accessing RNG interface.
Removes refcount
drivers: stm32_rng: keep rng enable from initialization
Changes stm32_rng driver implementation to keep RNG running and only gate the access bus clock when accessing RNG interface.
Removes refcount field from stm32_rng_instance structure as it is now unused.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ea8ba295 | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: register to dt_driver
Changes stm32_rng driver to be probed from DT_DRIVER framework. This change modifies slightly how the driver is initialized. Early late initcall function st
drivers: stm32_rng: register to dt_driver
Changes stm32_rng driver to be probed from DT_DRIVER framework. This change modifies slightly how the driver is initialized. Early late initcall function stm32_rng_init() is replaced with a FDT helper function stm32_rng_parse_fdt() and a DT_DRIVER probe function stm32_rng_probe().
Changes stm32_rng driver initialization sequence to reset, if configured, the RNG hardware subsystem at driver initialization.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| eb243bce | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp1: enable hardware rng for STM32MP13
Adds RNG node in stm32mp131.dtsi and enables it in stm32mp135f-dk.dts.
Default disables CFG_WITH_SOFTWARE_PRNG for STM32MP13: OP-TEE uses the HW RNG
plat-stm32mp1: enable hardware rng for STM32MP13
Adds RNG node in stm32mp131.dtsi and enables it in stm32mp135f-dk.dts.
Default disables CFG_WITH_SOFTWARE_PRNG for STM32MP13: OP-TEE uses the HW RNG support.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 61b2d6e4 | 25-Jan-2023 |
lei zhou <lei.zhou@linaro.org> |
mk/compile.mk: add -Ulinux -Uunix to dtb-cppflags
Add -Ulinux and -Uunix to dtb-cppflags to fix two corner cases, where DTS file might contain properties like following:
dma_coherent: coherent { c
mk/compile.mk: add -Ulinux -Uunix to dtb-cppflags
Add -Ulinux and -Uunix to dtb-cppflags to fix two corner cases, where DTS file might contain properties like following:
dma_coherent: coherent { compatible = "shared-dma-pool"; linux,dma-default; }
Without these flags, C preprocessor will modify "linux,dma-default" to "1,dma-default"
Signed-off-by: lei zhou <lei.zhou@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| e7b17391 | 24-Jan-2023 |
Clement Faure <clement.faure@nxp.com> |
core: crypto_api: remove unused includes
Remove unused includes from the crypto API.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
core: crypto_api: remove unused includes
Remove unused includes from the crypto API.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1bd5ecaf | 24-Jan-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: remove unused includes
Remove unused includes from the CAAM driver.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acke
drivers: caam: remove unused includes
Remove unused includes from the CAAM driver.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 41bd035b | 24-Jan-2023 |
Clement Faure <clement.faure@nxp.com> |
core: imx: remove unused includes
Remove unused includes from main.c
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wik
core: imx: remove unused includes
Remove unused includes from main.c
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3cd271a4 | 24-Jan-2023 |
Clement Faure <clement.faure@nxp.com> |
core: crypto_api: fix malloc() allocation check
Coverity reports a CERT-C ERR33-C coding violation on EM.data pointer for not being checked right after malloc() call. This is a false positive error
core: crypto_api: fix malloc() allocation check
Coverity reports a CERT-C ERR33-C coding violation on EM.data pointer for not being checked right after malloc() call. This is a false positive error since EM.data value is checked along EM_gen.data value later. Check EM.data and EM_gen.data values separately to make Coverity happy.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8f31ccb0 | 25-Jan-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add StMM to reported services
Adds StMM to the list of services reported by the device pseudo TA.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Ilias Apalodimas <ilias
core: add StMM to reported services
Adds StMM to the list of services reported by the device pseudo TA.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a4186cf5 | 06-Jan-2023 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: add support for sama5d27-wlsom1-ek board
Add support for PLATFORM_FLAVOR=sama5d27_wlsom1_ek and use the correct debug console (UART0) for that platform.
Signed-off-by: Clément Léger <clem
plat-sam: add support for sama5d27-wlsom1-ek board
Add support for PLATFORM_FLAVOR=sama5d27_wlsom1_ek and use the correct debug console (UART0) for that platform.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 130b51d3 | 06-Jan-2023 |
Clément Léger <clement.leger@bootlin.com> |
dts: at91: add sama5d27-wlsom1-ek device-trees
Import device-tree from Linux for sama5d27-wlsom1-ek board.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Jens Wiklander <jens.wi
dts: at91: add sama5d27-wlsom1-ek device-trees
Import device-tree from Linux for sama5d27-wlsom1-ek board.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 530f76bb | 24-Jan-2023 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: crypto: se050: increase DER signature buffer
In order to support P-521 (132 byte {r,s} pairs), the buffer storing the DER signature must be large enough.
Signed-off-by: Jorge Ramirez-Ortiz
drivers: crypto: se050: increase DER signature buffer
In order to support P-521 (132 byte {r,s} pairs), the buffer storing the DER signature must be large enough.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| c450df92 | 24-Jan-2023 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
ci: SE05X crypto driver: update Plug-and-Trust release to v0.4.1
Fixes to ECDSA and access policies to the asymmetric keys.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome
ci: SE05X crypto driver: update Plug-and-Trust release to v0.4.1
Fixes to ECDSA and access policies to the asymmetric keys.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 5abb46e2 | 23-Jan-2023 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: drivers: se050: fix generation of oid values
Converting the OID watermarked value (8 bytes) to a bignum removes the first byte if this is different than zero.
The failing case observed the
crypto: drivers: se050: fix generation of oid values
Converting the OID watermarked value (8 bytes) to a bignum removes the first byte if this is different than zero.
The failing case observed the value 0x57.72.15.66.1a.f2.9d.00 being retrieved as 0x57.72.15.66.1a.f2.9d after having been transformed into a bignum and back to its original binary value.
This will cause cryptographic operations to fail as the secured keys and objects become not addressable.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 9e7f74ce | 19-Oct-2021 |
Clement Faure <clement.faure@nxp.com> |
pta: imx: add OCOTP PTA
Add a OCOTP PTA for i.MX platforms. This PTA exposes two commands: - the read of OCOTP shadow registers. - the read of the platform UID.
Signed-off-by: Clement Faure <clem
pta: imx: add OCOTP PTA
Add a OCOTP PTA for i.MX platforms. This PTA exposes two commands: - the read of OCOTP shadow registers. - the read of the platform UID.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e91fa6a0 | 19-Oct-2021 |
Clement Faure <clement.faure@nxp.com> |
pta: imx: add DIGPROG PTA
Add an i.MX PTA to get the platform digprog value. This 32 bits value holds the SOC type and the minor and major revision number.
Signed-off-by: Clement Faure <clement.fau
pta: imx: add DIGPROG PTA
Add an i.MX PTA to get the platform digprog value. This 32 bits value holds the SOC type and the minor and major revision number.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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