| af9ee0e0 | 24-May-2023 |
Alvin Chang <alvinga@andestech.com> |
libutee: riscv: Fix relocation type of function call into __utee_panic()
In RISC-V, "j" instruction has R_RISCV_JAL relocation that can represent an even signed 21-bit offset (+-1MiB). However, this
libutee: riscv: Fix relocation type of function call into __utee_panic()
In RISC-V, "j" instruction has R_RISCV_JAL relocation that can represent an even signed 21-bit offset (+-1MiB). However, this range is not enough to be position independent code, and the linker generates linking error. Fix it by using "tail" instruction which has R_RISCV_CALL_PLT relocation that the execution can jump to +-2GB location.
Note that we won't return from _utee_panic(), that's why we use "tail" instead of "call" instruction so that we won't generate redundant return instruction.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: liushiwei <liushiwei@eswincomputing.com>
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| d7c41fc3 | 25-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: pinctrl: fix stubbed pinctrl_free_state()
Fixes pinctrl_free_state() when CFG_DRIVERS_PINCTRL is disabled as the API function has no return value.
The issue is reported by GCC with an erro
drivers: pinctrl: fix stubbed pinctrl_free_state()
Fixes pinctrl_free_state() when CFG_DRIVERS_PINCTRL is disabled as the API function has no return value.
The issue is reported by GCC with an error trace like the below:
core/include/drivers/pinctrl.h: In function ‘pinctrl_free_state’: lib/libutee/include/tee_api_defines.h:117:43: error: ‘return’ with a value, in function returning void [-Werror=return-type] 117 | #define TEE_ERROR_NOT_SUPPORTED 0xFFFF000A | ^~~~~~~~~~ core/include/drivers/pinctrl.h:158:16: note: in expansion of macro ‘TEE_ERROR_NOT_SUPPORTED’ 158 | return TEE_ERROR_NOT_SUPPORTED; | ^~~~~~~~~~~~~~~~~~~~~~~ In file included from core/include/drivers/stm32_uart.h:10, from core/arch/arm/plat-stm32mp1/main.c:14: core/include/drivers/pinctrl.h:156:6: note: declared here 156 | void pinctrl_free_state(struct pinctrl_state *state __unused) | ^~~~~~~~~~~~~~~~~~
Fixes: 9aec039ec0d7 ("drivers: pinctrl: add pinctrl support") Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| e1aad7e9 | 24-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: riscv: fix interrupt_main_handler() reference
Fixes itr_core_handler() reference in RiscV architecture that was renamed interrupt_main_handler() in commit referred below.
Fixes: 358bf47c0612
core: riscv: fix interrupt_main_handler() reference
Fixes itr_core_handler() reference in RiscV architecture that was renamed interrupt_main_handler() in commit referred below.
Fixes: 358bf47c0612 ("core: interrupt: rename itr_core_handler()") Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ffa93873 | 04-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: initialize my_rxtx.size
Adds missing initialization of my_rxtx.size with CFG_CORE_SEL2_SPMC=y.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balin
core: ffa: initialize my_rxtx.size
Adds missing initialization of my_rxtx.size with CFG_CORE_SEL2_SPMC=y.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f49f23f7 | 03-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: rename nw_rxtx to my_rxtx
Renames nw_rxtx to my_rxtx to be more clear when we have an SPMC at S-EL2 and the rxtx buffer is shared with the SPMC instead of normal world.
Reviewed-by: Jero
core: ffa: rename nw_rxtx to my_rxtx
Renames nw_rxtx to my_rxtx to be more clear when we have an SPMC at S-EL2 and the rxtx buffer is shared with the SPMC instead of normal world.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 923f61cd | 03-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: support FFA_VERSION from S-EL0 SPs only
FFA_VERSION using ERET as conduit is not permitted in the FF-A specification. So remove support for it in thread_spmc_msg_recv() but keep it in spm
core: ffa: support FFA_VERSION from S-EL0 SPs only
FFA_VERSION using ERET as conduit is not permitted in the FF-A specification. So remove support for it in thread_spmc_msg_recv() but keep it in spmc_sp_msg_handler() for S-EL0 SPs where the conduit is SVC.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 412d46f6 | 02-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: support FFA_SPM_ID_GET
Supports the FFA_SPM_ID_GET function introduced with FF-A v1.1.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobsza
core: ffa: support FFA_SPM_ID_GET
Supports the FFA_SPM_ID_GET function introduced with FF-A v1.1.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8af78138 | 02-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: rename spmc_get_id() to get_my_id()
Renames spmc_get_id() to get_my_id() in order to avoid confusion with the function FFA_SPM_ID_GET introduced with FF-A v1.1.
Reviewed-by: Jerome Foris
core: ffa: rename spmc_get_id() to get_my_id()
Renames spmc_get_id() to get_my_id() in order to avoid confusion with the function FFA_SPM_ID_GET introduced with FF-A v1.1.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| faef0dd6 | 02-Feb-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
ci: build CFG_CORE_SEL1_SPMC=y CFG_NS_VIRTUALIZATION=y
Add a build with both CFG_CORE_SEL1_SPMC=y and CFG_NS_VIRTUALIZATION=y.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off
ci: build CFG_CORE_SEL1_SPMC=y CFG_NS_VIRTUALIZATION=y
Add a build with both CFG_CORE_SEL1_SPMC=y and CFG_NS_VIRTUALIZATION=y.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a65dd3a6 | 02-Feb-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: spmc: support virtualization with SPMC at S-EL1
Adds support for virtualization with OP-TEE as SPMC at S-EL1. This if the FF-A counterpart of SMC based ABI with virtualization.
Reviewed-by: B
core: spmc: support virtualization with SPMC at S-EL1
Adds support for virtualization with OP-TEE as SPMC at S-EL1. This if the FF-A counterpart of SMC based ABI with virtualization.
Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cfbb92ac | 02-Feb-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: register spmc_init() with boot_final()
In case of virtualization registers spmc_init() with boot_final() instead of service_init() to have my_endpoint_id initialized as part of boot initializa
core: register spmc_init() with boot_final()
In case of virtualization registers spmc_init() with boot_final() instead of service_init() to have my_endpoint_id initialized as part of boot initialization instead of delayed initialization when the OP-TEE partition is created.
This guarantees that my_endpoint_id holds the correct value when the first FF-A request is received.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ab1ba412 | 02-Feb-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add memory type MEM_AREA_NEX_NSEC_SHM
Adds the memory type MEM_AREA_NEX_NSEC_SHM used to map non-secure shared memory in the nexus.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
core: add memory type MEM_AREA_NEX_NSEC_SHM
Adds the memory type MEM_AREA_NEX_NSEC_SHM used to map non-secure shared memory in the nexus.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 79321a89 | 02-Feb-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add virt_get_current_guest_id()
Adds the helper function virt_get_current_guest_id().
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander
core: add virt_get_current_guest_id()
Adds the helper function virt_get_current_guest_id().
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a1c53023 | 02-Feb-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: spmc: support FF-A 1.1
Adds support for FF-A 1.1. Now OP-TEE will need to be able to work with both version 1.0 and 1.1 depending on the other endpoint. The callee supplies its implemented ver
core: spmc: support FF-A 1.1
Adds support for FF-A 1.1. Now OP-TEE will need to be able to work with both version 1.0 and 1.1 depending on the other endpoint. The callee supplies its implemented version and OP-TEE chooses the highest common version and returns that. This is done per endpoint so some endpoint may very well use version 1.0 while another uses version 1.1.
Two data structures, struct ffa_mem_transaction and struct ffa_partition_info, are affected. Runtime conditionals are used to select which version to use based on the negotiated FF-A version.
Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| fba7d2ad | 02-Feb-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: spmc: improve checks in handle_mem_share()
For the two FF-A functions FFA_MEM_SHARE_64 and FFA_MEM_SHARE_32 update the checks in handle_mem_share() for: - 32-bit vs 64-bit calling convention,
core: spmc: improve checks in handle_mem_share()
For the two FF-A functions FFA_MEM_SHARE_64 and FFA_MEM_SHARE_32 update the checks in handle_mem_share() for: - 32-bit vs 64-bit calling convention, that is, when to mask of the upper 32 bits. - that the reported fragment length does not exceed the total length of the memory transaction descriptor.
Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 30bfe0d4 | 06-Mar-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64: use adr_l for __nex_bss_start and __nex_bss_end
Fixes the following linker errors when CFG_NS_VIRTUALIZATION is enabled: .../entry_a64.o: in function `clear_bss': .../entry_a64.
core: arm64: use adr_l for __nex_bss_start and __nex_bss_end
Fixes the following linker errors when CFG_NS_VIRTUALIZATION is enabled: .../entry_a64.o: in function `clear_bss': .../entry_a64.S:237:(.text._start+0x8c): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__nex_bss_start' defined in .bss.mempool_default section in all_objs.o .../entry_a64.S:238:(.text._start+0x90): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__nex_bss_end' defined in .bss.mempool_default section in all_objs.o
Use the adr_l macro instead of adr to get the addresses for start and end of .nex_bss.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c0b7e57a | 19-May-2023 |
Alvin Chang <alvinga@andestech.com> |
riscv: plat-virt: Override default platform ISA extensions
RV64 virtual platform on QEMU supports C(compressed), Zicsr, and Zifencei extensions. To specify the ISA extensions into RISC-V toolchain s
riscv: plat-virt: Override default platform ISA extensions
RV64 virtual platform on QEMU supports C(compressed), Zicsr, and Zifencei extensions. To specify the ISA extensions into RISC-V toolchain so that toolchain can generate the code correctly, these ISA extensions should be encoded into "-march" flag. This patch overrides the default ISA extensions which is defined in riscv.mk to specify the extension that the platform really supports.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f65415b3 | 19-May-2023 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Add default variables for platform ISA, ABI and code model
In RISC-V, each platform may have different supported ISA extensions, ABI, and code model. In this commit, we define the defau
core: riscv: Add default variables for platform ISA, ABI and code model
In RISC-V, each platform may have different supported ISA extensions, ABI, and code model. In this commit, we define the default variables of ISA extensions, ABI, and code model in RISC-V core Makefile. The platform can further overrides the values in their plat-*/conf.mk.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bb5d1825 | 12-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: invalidate handle of destroyed token objects
Marks as invalid any object handle that refers to the token object that is being destroying so that any use of the related handle will consid
ta: pkcs11: invalidate handle of destroyed token objects
Marks as invalid any object handle that refers to the token object that is being destroying so that any use of the related handle will consider the object handle as invalid.
Link: https://github.com/OP-TEE/optee_os/issues/6005 Reviewed-by: Valerii Chubar <valerii_chubar@epam.com> Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 2bc50ed5 | 12-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: invalidating handle in a database
Introduces a specific pointer value for handles that are no more valid and API function handle_invalidate() to mark that a handle is no more valid.
Rev
ta: pkcs11: invalidating handle in a database
Introduces a specific pointer value for handles that are no more valid and API function handle_invalidate() to mark that a handle is no more valid.
Reviewed-by: Valerii Chubar <valerii_chubar@epam.com> Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| b8fa5170 | 12-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: factorize handle reference sanity test
Factorizes sanity validation of handle database and handle value in pkcs11 TA handle functions
Reviewed-by: Valerii Chubar <valerii_chubar@epam.co
ta: pkcs11: factorize handle reference sanity test
Factorizes sanity validation of handle database and handle value in pkcs11 TA handle functions
Reviewed-by: Valerii Chubar <valerii_chubar@epam.com> Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| a564092c | 14-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver_test: move source file to core/pta/test/
Moves dt_driver_test.c from core/kernel/ to core/pta/test/ where most embedded tests implementation are located. This is legitimate as the te
core: dt_driver_test: move source file to core/pta/test/
Moves dt_driver_test.c from core/kernel/ to core/pta/test/ where most embedded tests implementation are located. This is legitimate as the test results are retrieved from the Invoke PTA interface, even if the test is not effectively run from an invocation command of that PTA.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 63b4d5d6 | 23-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver_test: fix test failure status
Before this change, failing clock/reset/gpios tests do print a "not run" status message because related status dt_test_state.probe_xxx remains to DEFAUL
core: dt_driver_test: fix test failure status
Before this change, failing clock/reset/gpios tests do print a "not run" status message because related status dt_test_state.probe_xxx remains to DEFAULT value and are never set to FAILED. Fix this and move each test to a specific local function to ease error cases management using 'goto' instructions.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 693a5271 | 09-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver_test: clarify "not run" status message
Changes trace message from "not passed" to "not run" when a test is not run.
Suggested-by: Jerome Forissier <jerome.forissier@linaro.org> Acke
core: dt_driver_test: clarify "not run" status message
Changes trace message from "not passed" to "not run" when a test is not run.
Suggested-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 01980f3f | 16-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: interrupt: rename itr_init()
Renames itr_init() to interrupt_main_init() as a later change will modify interrupt chip API functions using interrupt_ as prefix.
Reviewed-by: Jens Wiklander <je
core: interrupt: rename itr_init()
Renames itr_init() to interrupt_main_init() as a later change will modify interrupt chip API functions using interrupt_ as prefix.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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