core: add CFG_WDT_SM_HANDLER_ID in TOS fast call list

Add CFG_WDT_SM_HANDLER_ID as a TOS fast call entry to manage the
ARM watchdog service in 64 bit mode. Add also the associated ABI
description.
D

core: add CFG_WDT_SM_HANDLER_ID in TOS fast call list

Add CFG_WDT_SM_HANDLER_ID as a TOS fast call entry to manage the
ARM watchdog service in 64 bit mode. Add also the associated ABI
description.
Define the CFG_WDT_SM_HANDLER_ID with a default value.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: regulator framework

Introduces a voltage regulator driver framework for management
of regulators and supply dependencies. The framework permits 1
regulator supply per regulator.

API functi

drivers: regulator framework

Introduces a voltage regulator driver framework for management
of regulators and supply dependencies. The framework permits 1
regulator supply per regulator.

API function regulator_register() allows a regulator driver to
register a regulator in the regulator framework.

Supported operation here are to enable, disable, get and set
voltage level. They are all optional.

Registered regulators are referenced in a list for initialization
resource release and debug purpose.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Co-developed-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: support fault mitigations in non-threaded code

Fault mitigation won't work in non-threaded code due to the following
error:
assertion 'ct >= 0 && ct < CFG_NUM_THREADS' failed at core/arch/arm/

core: support fault mitigations in non-threaded code

Fault mitigation won't work in non-threaded code due to the following
error:
assertion 'ct >= 0 && ct < CFG_NUM_THREADS' failed at core/arch/arm/kernel
/thread.c:799 <thread_get_id>

The problem is in __ftmn_get_tsd_func_arg_pp which calls thread_get_tsd
which thread_get_id. The reason is that the interrupt handler is not
associated with any thread, so the ct (current_thread_id) value is -1 which
would cause an assert problem.

The fix is to add ftmn_arg to thread_core_local and the new variable would
be used when the current thread is < 0.

Signed-off-by: Sichun Qin <sichun.qin@amlogic.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: pta: stats: implement a method to get tee and ree time

Add new command (STATS_CMD_GET_TIME) in the stats PTA.
The command returns the tee and ree time for debug purposes.
https://github.com/OP

core: pta: stats: implement a method to get tee and ree time

Add new command (STATS_CMD_GET_TIME) in the stats PTA.
The command returns the tee and ree time for debug purposes.
https://github.com/OP-TEE/optee_os/issues/6304

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Tested-by: Weizhao Jiang <weizhaoj@amazon.com>
Signed-off-by: Weizhao Jiang <weizhaoj@amazon.com>

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core: spmc: implement boot-order support

Add support for boot-order property specified in the
SP manifest.

Signed-off-by: Gabor Ambrus <gabor.ambrus@arm.com>
Signed-off-by: Gabor Toth <gabor.toth2@

core: spmc: implement boot-order support

Add support for boot-order property specified in the
SP manifest.

Signed-off-by: Gabor Ambrus <gabor.ambrus@arm.com>
Signed-off-by: Gabor Toth <gabor.toth2@arm.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: SPMC obtain device memory info from DTB

When CFG_CORE_SEL2_SPMC = y, obtain device memory info from
the SP manifest DTB.

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wikland

core: arm: SPMC obtain device memory info from DTB

When CFG_CORE_SEL2_SPMC = y, obtain device memory info from
the SP manifest DTB.

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: pm: imx: remove useless header includes

Remove useless header includes in psci.c

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

drivers: pm: imx: relocate power management code

Relocate power management functions from plat-imx/pm to
core/drivers/pm/imx

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wikl

drivers: pm: imx: relocate power management code

Relocate power management functions from plat-imx/pm to
core/drivers/pm/imx

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: re-work GPCv2 driver

Re-work GPCv2 driver:
* use io_clr/set functions
* use timeout for register polling
Remove imx_gpcv2_set_core1_pdn_by_software() function.

Signed-off-by: Clement F

core: imx: re-work GPCv2 driver

Re-work GPCv2 driver:
* use io_clr/set functions
* use timeout for register polling
Remove imx_gpcv2_set_core1_pdn_by_software() function.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: move gpcv2 functions definitions to local.h

Move imx_gpcv2_set_core1_pdn_by_software() and
imx_gpcv2_set_core1_pup_by_software() definitions to local.h.
Make imx_gpcv2_set_core_pgc() stat

core: imx: move gpcv2 functions definitions to local.h

Move imx_gpcv2_set_core1_pdn_by_software() and
imx_gpcv2_set_core1_pup_by_software() definitions to local.h.
Make imx_gpcv2_set_core_pgc() static.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: cleanup imx-regs.h

Remove macros from imx-regs.h and relocate to appropriate source files.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@l

core: imx: cleanup imx-regs.h

Remove macros from imx-regs.h and relocate to appropriate source files.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: move PSCI SNVS operation to the driver

Create imx_snvs_shutdown() to use during psci_system_off() call.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jen

core: imx: move PSCI SNVS operation to the driver

Create imx_snvs_shutdown() to use during psci_system_off() call.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: fix IOMUXC GPR5 register read

Define IOMUXC_SIZE value for imx7 platforms and re-work the way the GPR
register is read.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jen

core: imx: fix IOMUXC GPR5 register read

Define IOMUXC_SIZE value for imx7 platforms and re-work the way the GPR
register is read.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: re-work SRC driver

Encapsulate all SRC register operations in dedicated functions.
Move SRC register offsets and values to SRC source file.
Define SRC_SIZE for i.MX6 and i.MX7 platforms.

core: imx: re-work SRC driver

Encapsulate all SRC register operations in dedicated functions.
Move SRC register offsets and values to SRC source file.
Define SRC_SIZE for i.MX6 and i.MX7 platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: move SRC driver to pm directory

Move the SRC driver to pm sub-directory since it is related to the power
management PSCI features.
Rename it from imx_src.c to src.c.
Create a local header

core: imx: move SRC driver to pm directory

Move the SRC driver to pm sub-directory since it is related to the power
management PSCI features.
Rename it from imx_src.c to src.c.
Create a local header file.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: remove PSCI_CPU_SUSPEND capability

Remove the PSCI_CPU_SUSPEND capability as it is not supported.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wikl

core: imx: remove PSCI_CPU_SUSPEND capability

Remove the PSCI_CPU_SUSPEND capability as it is not supported.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: remove power management code for imx7d platforms

The code for suspend and cpuidle is not functioning properly,
outdated and unmaintained.
Remove these two features and associated code.

S

core: imx: remove power management code for imx7d platforms

The code for suspend and cpuidle is not functioning properly,
outdated and unmaintained.
Remove these two features and associated code.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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scripts: sign_rproc_fw: clean up unused TLV method

Remove the __len__ method of the TLV class. It is not being
used and uses an undefined variable TLV_INFO_SIZE.
This method is a remnant of code tha

scripts: sign_rproc_fw: clean up unused TLV method

Remove the __len__ method of the TLV class. It is not being
used and uses an undefined variable TLV_INFO_SIZE.
This method is a remnant of code that was removed during upstream
reviews.

Fixes: e8ef53536bda ("scripts: add remote processor firmware signature tool")
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: use monotonic counter for secure storage without RPMB

If OP-TEE is configured without RPMB (CFG_REE_FS_INTEGRITY_RPMB=n), use
the non-volatile monotonic counter interface instead to protect ag

core: use monotonic counter for secure storage without RPMB

If OP-TEE is configured without RPMB (CFG_REE_FS_INTEGRITY_RPMB=n), use
the non-volatile monotonic counter interface instead to protect against
rollback of the REE FS base secure storage.

If configured without CFG_WARN_INSECURE=y, accept
TEE_ERROR_NOT_IMPLEMENTED error from nv_counter_get_ree_fs() and
nv_counter_incr_ree_fs_to() and warn once to make clear that the
configuration isn't secure.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: add non-volatile monotonic counter interface

Adds a stubbed non-volatile monotonic counter interface with a REE FS
counter. Platforms or drivers overrides the weak functions
nv_counter_get_ree

core: add non-volatile monotonic counter interface

Adds a stubbed non-volatile monotonic counter interface with a REE FS
counter. Platforms or drivers overrides the weak functions
nv_counter_get_ree_fs() and nv_counter_incr_ree_fs_to() to provide a
non-stubbed implementation of the counter.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: riscv: tee: add entry_fast.c

This commit adds an implementation of fast call handers. It copies
the original implementation replacing thread_smc_args structures
with thread_abi_args counterpar

core: riscv: tee: add entry_fast.c

This commit adds an implementation of fast call handers. It copies
the original implementation replacing thread_smc_args structures
with thread_abi_args counterparts. tee_entry_fastcall_l2cc_mutex()
has been modified to return OPTEE_ABI_RETURN_UNKNOWN_FUNCTION.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Alvin Chang <alvinga@andestech.com>

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core: riscv: add thread_optee_abi.c

This commit just copies thread_optee_smc.c from ARM and renames
smc/SMC to abi/ABI.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Alv

core: riscv: add thread_optee_abi.c

This commit just copies thread_optee_smc.c from ARM and renames
smc/SMC to abi/ABI.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Alvin Chang <alvinga@andestech.com>

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core: riscv: include: add tee/teeabi_opteed_macros.h

This commit just copies teesmc_opteed_macros.h from ARM and renames
smc/SMC to abi/ABI.
All unused and ARM-related macros are removed.

Signed-of

core: riscv: include: add tee/teeabi_opteed_macros.h

This commit just copies teesmc_opteed_macros.h from ARM and renames
smc/SMC to abi/ABI.
All unused and ARM-related macros are removed.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Alvin Chang <alvinga@andestech.com>

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core: riscv: include: add tee/teeabi_opteed.h

This commit just copies teesmc_opteed.h from ARM and renames
smc/SMC to abi/ABI.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-

core: riscv: include: add tee/teeabi_opteed.h

This commit just copies teesmc_opteed.h from ARM and renames
smc/SMC to abi/ABI.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Alvin Chang <alvinga@andestech.com>

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core: riscv: include: add tee/optee_abi.h

This commit just copies optee_smc.h from ARM and renames
smc/SMC to abi/ABI.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Alvi

core: riscv: include: add tee/optee_abi.h

This commit just copies optee_smc.h from ARM and renames
smc/SMC to abi/ABI.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Alvin Chang <alvinga@andestech.com>

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