| 7d41fd4c | 13-Nov-2023 |
loubaihui <loubaihui1@huawei.com> |
core: drivers: modify debug and error messages in hisi_trng
Modify debug and error messages in hisi_trng.c
Fixes: fb5592f9cfeb ("core: drivers: add HiSilicon TRNG implementation") Signed-off-by: lo
core: drivers: modify debug and error messages in hisi_trng
Modify debug and error messages in hisi_trng.c
Fixes: fb5592f9cfeb ("core: drivers: add HiSilicon TRNG implementation") Signed-off-by: loubaihui <loubaihui1@huawei.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| c7f9abce | 21-Nov-2023 |
Xiaoxu Zeng <zengxiaoxu@huawei.com> |
drivers: implement HiSilicon Queue Management (QM) module
The Hisilicon QM is a Queue Management module. In order to unify the interface between accelerator and software, a unified queue management
drivers: implement HiSilicon Queue Management (QM) module
The Hisilicon QM is a Queue Management module. In order to unify the interface between accelerator and software, a unified queue management module QM is used to interact with software. Each accelerator module integrates a QM. Software issues tasks to the SQ (Submmision Queue),and the QM obtains the address of the SQE (Submmision Queue Element). The BD (Buffer Description, same as SQE) information is sent to the accelerator. After the task processing is complete, the accelerator applies for a write-back address from the QM to write back the SQ.
Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|
| f1318653 | 22-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
ci: sync SCP-firmware on v2.13.0 release tag
Synchronize SCP-firmware Git repository revision on v2.13.0 release tag to avoid issues with latest merged changes in SCP-firmware that OP-TEE OS may not
ci: sync SCP-firmware on v2.13.0 release tag
Synchronize SCP-firmware Git repository revision on v2.13.0 release tag to avoid issues with latest merged changes in SCP-firmware that OP-TEE OS may not be compliant with.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 2eba68d2 | 28-Sep-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
ta: pkcs11: prevent user ID verification when user PIN is not set
Fix User PIN verification in ACL mode (protected authentication) so that it always returns PKCS11_CKR_USER_PIN_NOT_INITIALIZED when
ta: pkcs11: prevent user ID verification when user PIN is not set
Fix User PIN verification in ACL mode (protected authentication) so that it always returns PKCS11_CKR_USER_PIN_NOT_INITIALIZED when User PIN has not been initialized yet by the Security Officer. Before this change, this was tested only in the standard PIN path, not for the authenticated TEE identity mode (CFG_PKCS11_TA_AUTH_TEE_IDENTITY=y).
Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 26e4d95e | 03-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: scmi_server: expose IOD regulators
Replace stubs with recently introduced IO domain regulators in SCMI server for STM32MP13 variants.
Acked-by: Patrick Delaunay <patrick.delaunay@fos
plat-stm32mp1: scmi_server: expose IOD regulators
Replace stubs with recently introduced IO domain regulators in SCMI server for STM32MP13 variants.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 6767c66b | 07-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: scmi_server: simplify regulators identification
Explicitly use a name ID of PMIC regulators identification and a numerical ID for PWR and stubbed regulators identification while there
plat-stm32mp1: scmi_server: simplify regulators identification
Explicitly use a name ID of PMIC regulators identification and a numerical ID for PWR and stubbed regulators identification while there is only 1 VREFBUF regulator that doesn't need such ID.
Remove string comparison from name to ID conversion for PWR in order to simplify later use of SDMMC IO domain regulators on STM32MP13 variants.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 053956b0 | 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32mp13: IO domain regulators
Define STM32MP13 IO domains regulators of the stm32mp13f-dk board based on recently merge stm32mp1_regulator_io driver.
Acked-by: Patrick Delaunay <patrick.dela
dts: stm32mp13: IO domain regulators
Define STM32MP13 IO domains regulators of the stm32mp13f-dk board based on recently merge stm32mp1_regulator_io driver.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 23f9bd99 | 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: regulator: IO domain regulators for STM32MP13
Add STM32MP13 IO domains regulators allowing a consumer to manage IO domains are voltage regulators.
Acked-by: Patrick Delaunay <patrick.delau
drivers: regulator: IO domain regulators for STM32MP13
Add STM32MP13 IO domains regulators allowing a consumer to manage IO domains are voltage regulators.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Co-developed-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 83b3f587 | 07-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: pwr: use IO_READ32_POLL_TIMEOUT()
Update stm32mp1_pwr driver to use IO_READ32_POLL_TIMEOUT() macro.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevall
plat-stm32mp1: pwr: use IO_READ32_POLL_TIMEOUT()
Update stm32mp1_pwr driver to use IO_READ32_POLL_TIMEOUT() macro.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 4a93553c | 07-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: pwr: remove test on CFG_DRIVERS_REGULATOR
Remove tests on CFG_DRIVERS_REGULATOR value has the config switch is always enabled on stm32mp1 platform.
Acked-by: Patrick Delaunay <patric
plat-stm32mp1: pwr: remove test on CFG_DRIVERS_REGULATOR
Remove tests on CFG_DRIVERS_REGULATOR value has the config switch is always enabled on stm32mp1 platform.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| e18d5c7a | 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: pwr: configure HSLV for fixed VDD supplied domain
Update PWR driver to configure High Speed Low Voltage mode for fixed VDD supplied domain thanks to recently introduced SYSCFG HSLV AP
plat-stm32mp1: pwr: configure HSLV for fixed VDD supplied domain
Update PWR driver to configure High Speed Low Voltage mode for fixed VDD supplied domain thanks to recently introduced SYSCFG HSLV API functions. This configuration must be appleid at boot time and when resuming from a system low power state.
This configuration depends on VDD voltage level. It can protected by a OTP bit (HW2 bit 13) described in the chip reference manual for when VDD is supplied with a voltage below 2.5V. As stated in the chip reference manual, enabling HSLV mode with a VDD voltage level above 2.7V may be destructive hence the driver panics in such case.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Co-developed-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 43e0957a | 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: syscfg: HLSV mode for IO domains
Add platform API functions stm32mp_set_hslv_state() and stm32mp_enable_fixed_vdd_hslv() to configure High Speed Low Voltage mode of IO domains.
Platf
plat-stm32mp1: syscfg: HLSV mode for IO domains
Add platform API functions stm32mp_set_hslv_state() and stm32mp_enable_fixed_vdd_hslv() to configure High Speed Low Voltage mode of IO domains.
Platform function stm32mp_enable_fixed_vdd_hslv() is designed for fixed voltage IO domains that need to be enable at boot time only since the supply voltage level never changes.
On STM32MP13 variants, SDMMC IO domains may not be supplied by fixed voltage VDD but rather by a supply which voltage level can change at runtime for example to support SD/MMC normative 1.8V and 3.3V voltage modes. Therefore these IO domains require a runtime configuration function implemented by stm32mp_set_hslv_state().
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Co-developed-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 5611e846 | 03-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: syscfg: STM32MP13 dynamic IO compensation
Replace IO compensation API functions stm32mp_syscfg_enable_io_compensation() and stm32mp_syscfg_disable_io_compensation() with a new API fun
plat-stm32mp1: syscfg: STM32MP13 dynamic IO compensation
Replace IO compensation API functions stm32mp_syscfg_enable_io_compensation() and stm32mp_syscfg_disable_io_compensation() with a new API function stm32mp_set_io_comp_by_index() dedicated to runtime configuration of STM32MP13 SDMMC's domains IO compensation only.
On STM32MP15 variant, the configuration is enabled only during initialization. On STM32MP13 variant, the same feature is also enabled during initialization but the device embeds 2 more IO domains (SDMMC1 and SDMMC2) for which the new API function allow runtime reconfiguration support.
For sake of simplicity, keep related clocks always on.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Co-developed-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 649c864c | 03-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: syscfg: compute base address once
Compute SYSCFG virtual address only once.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@f
plat-stm32mp1: syscfg: compute base address once
Compute SYSCFG virtual address only once.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| e287ddde | 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: syscfg: use U() macro
Use U() macro where applicable in stm32mp1_syscfg.c driver.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.cheval
plat-stm32mp1: syscfg: use U() macro
Use U() macro where applicable in stm32mp1_syscfg.c driver.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| cbaf4c83 | 20-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: mmu: fix nsec ddr discovery regarding MEM_AREA_RAM_NSEC
Memory registered as MEM_AREA_RAM_NSEC can be part of the non-secure shared memory. This change fixes core_mmu_set_discovered_nsec_ddr()
core: mmu: fix nsec ddr discovery regarding MEM_AREA_RAM_NSEC
Memory registered as MEM_AREA_RAM_NSEC can be part of the non-secure shared memory. This change fixes core_mmu_set_discovered_nsec_ddr() to not check such memory area do not overlap with non-secure RAM. This is no issue physical pages from MEM_AREA_RAM_NSEC memory are also handled and mapped as dynamic non-secure memory by OP-TEE.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| ffeb2994 | 20-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: mm: use MEM_AREA_END to detect mapping area end
Change verify_special_mem_areas() prototype to remove the 'len' argument that is useless since end of the static mapping areas array is already
core: mm: use MEM_AREA_END to detect mapping area end
Change verify_special_mem_areas() prototype to remove the 'len' argument that is useless since end of the static mapping areas array is already defined by a MEM_AREA_END cell.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| fc7e0cc3 | 20-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: MEM_AREA_ROM_SEC maps secure read only cached memory
Define memory area mapping identifier MEM_AREA_ROM_SEC to map read-only secure cached memory.
Reviewed-by: Jens Wiklander <jens.wiklander@
core: MEM_AREA_ROM_SEC maps secure read only cached memory
Define memory area mapping identifier MEM_AREA_ROM_SEC to map read-only secure cached memory.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 8c7282be | 10-Oct-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: gic: use DT bindings
Use DT bindings GIC_PPI and GIC_SIP instead of 1 and 0 raw values.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@li
drivers: gic: use DT bindings
Use DT bindings GIC_PPI and GIC_SIP instead of 1 and 0 raw values.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 14885eb1 | 05-Oct-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: gic: register to dt_driver
Registers GIC driver as an interrupt controller in DT_DRIVER providers when DT is supported. This change allows interrupt consumer nodes to leverage interrupts an
drivers: gic: register to dt_driver
Registers GIC driver as an interrupt controller in DT_DRIVER providers when DT is supported. This change allows interrupt consumer nodes to leverage interrupts and interrupts-extended properties DT bindings for their device drivers to retrieve their interrupts.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| e9376d02 | 08-Oct-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: interrupt: add interrupt_create_handler()
Adds interrupt_create_handler() API function in interrupt framework. The function is to be used with interrupt controls obtained from the DT with int
core: interrupt: add interrupt_create_handler()
Adds interrupt_create_handler() API function in interrupt framework. The function is to be used with interrupt controls obtained from the DT with interrupt_dt_get() interrupt_dt_get_by_index() or interrupt_dt_get_by_name().
The function differs from legacy interrupt_add_handler() in that this latter always reconfigure the interrupt while new interrupt_create_handler() function assumes the interrupt was configured from interrupt_dt_get() or friends.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 33a0c835 | 14-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: interrupt: registering interrupt providers
Adds interrupt chip framework API functions for an interrupt controller to register as an interrupt provider in the driver probing sequence based on
core: interrupt: registering interrupt providers
Adds interrupt chip framework API functions for an interrupt controller to register as an interrupt provider in the driver probing sequence based on device tree. This allows interrupt consumer to be deferred when a dependent interrupt controller is not yet initialized.
Interrupt controllers register a driver in DT_DRIVER providers list with: interrupt_register_provider().
Interrupt consumer can get their interrupt through DT data with interrupt_dt_get(), interrupt_dt_get_by_index() or interrupt_dt_get_by_name().
This change removes inclusion of interrupt.h from kernel/dt.h as it is not needed and conflicts with inclusion of kernel/dt.h from kernel/interrupt.h.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| b548a657 | 06-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: dt_driver: reference output device reference as void *
Changes dt_driver API function to reference device reference as void * instead of void ** which could be confusing as the reference can b
core: dt_driver: reference output device reference as void *
Changes dt_driver API function to reference device reference as void * instead of void ** which could be confusing as the reference can be a pointer to a device pointer (e.g. in clk_dt.c) or a pointer to a structure (e.g. interrupt.c).
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| 955b02aa | 10-Oct-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: dt_driver: don't enforce phandle 1st arg is a phandle
Changes local function device_from_provider_prop() to assume its argument @prop points to the first argument to pass with phandle.
This c
core: dt_driver: don't enforce phandle 1st arg is a phandle
Changes local function device_from_provider_prop() to assume its argument @prop points to the first argument to pass with phandle.
This change allows a later change to support other DT bindings ("interrupts" property) where 1st cell of the property is not a phandle but the 1st phandle argument to be passed.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| a286b03f | 19-Apr-2021 |
Etienne Carriere <etienne.carriere@foss.st.com> |
scmi-msg: fix voltage domains inline comment header file
Fix voltage domains inline comment header file.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carrie
scmi-msg: fix voltage domains inline comment header file
Fix voltage domains inline comment header file.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|