| 9e5b467d | 22-Nov-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-ls: use gic_init_per_cpu()
Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Sahil Malhotra <sahil.ma
plat-ls: use gic_init_per_cpu()
Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| 159238dd | 22-Nov-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-k3: use gic_init_per_cpu()
Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Andrew Davis <afd@ti.com> |
| 34ea5b48 | 22-Nov-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-imx: use gic_init_per_cpu()
Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init()
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Clement Faure <clement.fau
plat-imx: use gic_init_per_cpu()
Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init()
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qsabresd, imx-mx6ulevk, imx-mx8qmmek, imx-mx8mnevk)
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| 9411c5f9 | 22-Nov-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-corstone1000: use gic_init_per_cpu()
Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 159ce56c | 22-Nov-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-aspeed: use gic_init_per_cpu()
Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Chia-Wei Wang <chiaw
plat-aspeed: use gic_init_per_cpu()
Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
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| efc40767 | 13-Dec-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-vexpress: use CFG_AUTO_MAX_PA_BITS on virtual platforms
By default set CFG_AUTO_MAX_PA_BITS=y on the virtual platforms fvp and qemu_armv8a to allow automatic configuration of the maximal suppor
plat-vexpress: use CFG_AUTO_MAX_PA_BITS on virtual platforms
By default set CFG_AUTO_MAX_PA_BITS=y on the virtual platforms fvp and qemu_armv8a to allow automatic configuration of the maximal supported physical address.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 1d129697 | 13-Dec-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add CFG_AUTO_MAX_PA_BITS
Add the configuration variable CFG_AUTO_MAX_PA_BITS that enables automatic discovery of maximal PA supported by the hardware.
Signed-off-by: Jens Wiklander <jens.wikl
core: add CFG_AUTO_MAX_PA_BITS
Add the configuration variable CFG_AUTO_MAX_PA_BITS that enables automatic discovery of maximal PA supported by the hardware.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 40613a28 | 13-Dec-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64.h: add read_id_aa64mmfr0_el1()
Add a read function for the system register ID_AA64MMFR0_EL1 and the mask ID_AA64MMFR0_EL1_PARANGE_MASK to extract the PARange field.
Signed-off-by: Jens
core: arm64.h: add read_id_aa64mmfr0_el1()
Add a read function for the system register ID_AA64MMFR0_EL1 and the mask ID_AA64MMFR0_EL1_PARANGE_MASK to extract the PARange field.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a5bf88f0 | 17-Jun-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
core: fix trace in add_node_to_probe()
Fix trace format, drv_name and node_name are inverted.
Fixes: b3a88b52a17c ("core: dt_driver probe sequence") Signed-off-by: Gatien Chevallier <gatien.chevall
core: fix trace in add_node_to_probe()
Fix trace format, drv_name and node_name are inverted.
Fixes: b3a88b52a17c ("core: dt_driver probe sequence") Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 04f7f019 | 06-Dec-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: return fpi size from FFA_PARTITION_INFO_GET
Until now has FFA_PARTITION_INFO_GET always returned zero in w3, but FF-A v1.1 requires FFA_PARTITION_INFO_GET to return the size of each parti
core: ffa: return fpi size from FFA_PARTITION_INFO_GET
Until now has FFA_PARTITION_INFO_GET always returned zero in w3, but FF-A v1.1 requires FFA_PARTITION_INFO_GET to return the size of each partition information descriptor returned if FFA_PARTITION_INFO_GET_COUNT_FLAG isn't set. So fix this by returning the size of a FF-A v1.1 partition information descriptor in w3.
Fixes: a1c53023cc80 ("core: spmc: support FF-A 1.1") Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 79f8990d | 04-Dec-2023 |
Clement Faure <clement.faure@nxp.com> |
scripts: checkpatch: fix word splitting in the command
The following would fail with Zsh instead of Bash : $ source ./scripts/checkpatch_inc.sh $ checkpatch HEAD Unknown option: typedefsfile typedef
scripts: checkpatch: fix word splitting in the command
The following would fail with Zsh instead of Bash : $ source ./scripts/checkpatch_inc.sh $ checkpatch HEAD Unknown option: typedefsfile typedefs.checkpatch Usage: .../scripts/checkpatch.pl [OPTION]... [FILE]
By setting xtrace in the _checkpatch() function, we can see the built command is interpreted differently depending on the shell: $CHECKPATCH $CHECKPATCH_OPT $typedefs_opt - In Zsh: /scripts/checkpatch.pl '--typedefsfile typedefs.checkpatch' - In Bash: /scripts/checkpatch.pl --typedefsfile typedefs.checkpatch -
Bash differs from Zsh when it comes to word splitting for unquoted parameters expansions. One solution is to use `eval` to execute the built command.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e1bfa2fd | 03-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: exposes a fastcall SMC watchdog service
Default defines watchdog management SMC based service for non-secure world to manage the watchdog supervised by OP-TEE secure world. Non-secure
plat-stm32mp1: exposes a fastcall SMC watchdog service
Default defines watchdog management SMC based service for non-secure world to manage the watchdog supervised by OP-TEE secure world. Non-secure world system can leverage this service for example by enabling a "arm,smc-wdt" compatible node with arm,smc-id=<0xbc000000> property in its DT.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| c825ffc9 | 24-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32mp15: disable non-secure IWDG2 on ST boards
Disable non-secure IWDG2 watchdog device in ST boards stm32mp157a-dk1, stm32mp157c-dk2, stm32mp157c-ed1 and stm32mp157c-ev1. This watchdog is fu
dts: stm32mp15: disable non-secure IWDG2 on ST boards
Disable non-secure IWDG2 watchdog device in ST boards stm32mp157a-dk1, stm32mp157c-dk2, stm32mp157c-ed1 and stm32mp157c-ev1. This watchdog is fully under control of the non-secure world and OP-TEE is not expected to interfere with it.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 23ca2138 | 24-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32mp15: enable secure IWDG1 on ST boards
Enable IWDG1 watchdog device in ST boards stm32mp157a-dk1, stm32mp157c-dk2, stm32mp157c-ed1 and stm32mp157c-ev1.
Reviewed-by: Gatien Chevallier <gat
dts: stm32mp15: enable secure IWDG1 on ST boards
Enable IWDG1 watchdog device in ST boards stm32mp157a-dk1, stm32mp157c-dk2, stm32mp157c-ed1 and stm32mp157c-ev1.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 6c884c93 | 26-Oct-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: rpc_alloc: remove size limit for kernel payload
Removes the size limit of 1 page imposed in thread_rpc_alloc_kernel_payload(). The purpose of this limit was to error out early since the k
core: arm: rpc_alloc: remove size limit for kernel payload
Removes the size limit of 1 page imposed in thread_rpc_alloc_kernel_payload(). The purpose of this limit was to error out early since the kernel doesn't supply a list of physical pages and the source of the error is not obvious at first glance. This is now about to change so remove the limit since the kernel now may supply the needed list of physical pages.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e92de4ca | 06-Dec-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: rpmb: cleanup useless write_counter in struct rpmb_fat_entry
The write_counter field of the rpmb_fat_entry struct is set from the RPMB device but never used. Rename it to 'unused' and cleanup
core: rpmb: cleanup useless write_counter in struct rpmb_fat_entry
The write_counter field of the rpmb_fat_entry struct is set from the RPMB device but never used. Rename it to 'unused' and cleanup the associated code.
Tested on QEMUv8 with:
$ make CFG_RPMB_FS=y CFG_RPMB_WRITE_KEY=y CFG_RPMB_TESKEY=y check
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp157c-ev1 w/ RPMB)
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| dc6563d7 | 07-Dec-2023 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: caam: update return type of caam_sm_free()
Update return type of caam_sm_free() from TEE_Result to enum caam_status.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Reviewed-by: Jer
drivers: caam: update return type of caam_sm_free()
Update return type of caam_sm_free() from TEE_Result to enum caam_status.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 57988105 | 07-Dec-2023 |
Alvin Chang <alvinga@andestech.com> |
riscv: virt: Enable CFG_DT
Enable CFG_DT to parse the external DTB passed by previous boot stage.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@lin
riscv: virt: Enable CFG_DT
Enable CFG_DT to parse the external DTB passed by previous boot stage.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>
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| 1dc521b9 | 07-Dec-2023 |
Alvin Chang <alvinga@andestech.com> |
riscv: virt: Relax the configurations related to hart/thread number
Do not force the CFG_TEE_CORE_NB_CORE and CFG_NUM_THREADS to be 1, since we may run SMP system which has multiple harts and thread
riscv: virt: Relax the configurations related to hart/thread number
Do not force the CFG_TEE_CORE_NB_CORE and CFG_NUM_THREADS to be 1, since we may run SMP system which has multiple harts and threads.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>
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| e088dff5 | 07-Dec-2023 |
Alvin Chang <alvinga@andestech.com> |
riscv: virt: Enable configurations for S-mode execution
In RISC-V QEMU virtual platform, we run OP-TEE as S-mode. This commit forcely enables CFG_RISCV_S_MODE and disables CFG_RISCV_M_MODE. Also, we
riscv: virt: Enable configurations for S-mode execution
In RISC-V QEMU virtual platform, we run OP-TEE as S-mode. This commit forcely enables CFG_RISCV_S_MODE and disables CFG_RISCV_M_MODE. Also, we enable CFG_RISCV_SBI so that OP-TEE utilizes SBI to communicate with other OS.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>
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| 0b9aa278 | 04-Dec-2023 |
Julien Masson <jmasson@baylibre.com> |
plat-mediatek: disable console when CFG_TEE_CORE_LOG_LEVEL is 0
Following our usage, it can be interesting to disable the console, typically for a final product.
Acked-by: Jens Wiklander <jens.wikl
plat-mediatek: disable console when CFG_TEE_CORE_LOG_LEVEL is 0
Following our usage, it can be interesting to disable the console, typically for a final product.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Co-developed-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Julien Masson <jmasson@baylibre.com>
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| 297b2ca9 | 30-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: scmi_server: remove useless bounding of voltage levels
Remove bounding of regulators supported voltage levels according to mix/max levels now that drivers take care of that.
Acked-by
plat-stm32mp1: scmi_server: remove useless bounding of voltage levels
Remove bounding of regulators supported voltage levels according to mix/max levels now that drivers take care of that.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| af5b9881 | 30-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: regulator: supported voltage consider levels bounds
Assert regulator_supported_voltages() provides a list that takes into account the min/max voltage levels possibly set from the secure DT.
drivers: regulator: supported voltage consider levels bounds
Assert regulator_supported_voltages() provides a list that takes into account the min/max voltage levels possibly set from the secure DT.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a7990eb0 | 30-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: set voltage list at pmic driver init
Bound stm32mp1_pmic supported voltage levels list to min/max voltage level values set from the DT. This change free quite a bit of byte in the hea
plat-stm32mp1: set voltage list at pmic driver init
Bound stm32mp1_pmic supported voltage levels list to min/max voltage level values set from the DT. This change free quite a bit of byte in the heap for this platform.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 91e28a63 | 30-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: regulator: stm32_vrefbuf: set voltage list at init
Change stm32_vrefbuf driver to set the supported voltage levels list at driver initialization rather than at first list query.
Acked-by:
drivers: regulator: stm32_vrefbuf: set voltage list at init
Change stm32_vrefbuf driver to set the supported voltage levels list at driver initialization rather than at first list query.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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