ci: set FORCE_UNSAFE_CONFIGURE=1

The newer version of Buildroot recently selected in the OP-TEE manifest
[1] does not allow building as root by default (apparently this is not
a Buildroot policy but

ci: set FORCE_UNSAFE_CONFIGURE=1

The newer version of Buildroot recently selected in the OP-TEE manifest
[1] does not allow building as root by default (apparently this is not
a Buildroot policy but rather defined in some packages included in
Buildroot). While this makes sense in general, we could not care less in
a CI container. Therefore set the appropriate environment variable to
bypass this check. We could as well change the Docker image to build as
a non-root user but let's just pick the easiest way for now.

Link: https://github.com/OP-TEE/manifest/pull/281 [1]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: kernel: change DT getters to use manifest DT

This change get_dt() and get_secure_dt() to use manifest DT
as an alternative if there is no embedded DT or external DT.

Signed-off-by: Sungbae Yo

core: kernel: change DT getters to use manifest DT

This change get_dt() and get_secure_dt() to use manifest DT
as an alternative if there is no embedded DT or external DT.

Signed-off-by: Sungbae Yoo <sungbaey@nvidia.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: kernel: move manifest DT functions to dt.c

This moves functions to handle manifest DT, used as a SP (secure partition)
manifest via FF-A interface, to core/kernel/dt.c and their definitions
to

core: kernel: move manifest DT functions to dt.c

This moves functions to handle manifest DT, used as a SP (secure partition)
manifest via FF-A interface, to core/kernel/dt.c and their definitions
to dt.h.
manifest DT is dependent with CORE_FFA that depends on CFG_DT, as the same
as dt.c.

Signed-off-by: Sungbae Yoo <sungbaey@nvidia.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: lib: scmi-server: drop CFG_CROSS_COMPILE when compiling SCP firmware

No need to specify this build directive as there is no cross-compilation
using CMake. This solve the following warning:

CM

core: lib: scmi-server: drop CFG_CROSS_COMPILE when compiling SCP firmware

No need to specify this build directive as there is no cross-compilation
using CMake. This solve the following warning:

CMake Warning:
Manually-specified variables were not used by the project:

CFG_CROSS_COMPILE

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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checkconf.mk: do not use full path to generate guard symbol in conf.h

The combination of building with -g3 (which emits definitions of all
defined preprocessor macros to the debug info) and using a

checkconf.mk: do not use full path to generate guard symbol in conf.h

The combination of building with -g3 (which emits definitions of all
defined preprocessor macros to the debug info) and using a full path
to define the name of this preprocessor guard means that the output is
not binary reproducible across different build hosts. For example, in
my Yocto build, the string

__home_ravi_yocto_tmp_glibc_work_stm32mp135fdk_oe_linux_gnueabi_optee_os_stm32mp_3_19_0_stm32mp_r1_1_build_stm32mp135f_dk_include_generated_conf_h_

appears in several build artifacts. Another developer or buildbot
would not build in some /home/ravi/... directory.

In order to increase binary reproducibility, only use the path sans
the $(out-dir)/ prefix of the conf.h file.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

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riscv: plat-virt: switch to dynamic shared memory

Enable dynamic shared memory for QEMU virt machine.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@an

riscv: plat-virt: switch to dynamic shared memory

Enable dynamic shared memory for QEMU virt machine.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: riscv: Add a reserved-memory node for static shared memory

To prevent Linux from using static shared memory, include the
dedicated reserved-memory node in the device tree.

Signed-off-by: Alvi

core: riscv: Add a reserved-memory node for static shared memory

To prevent Linux from using static shared memory, include the
dedicated reserved-memory node in the device tree.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: kernel: factor out shared memory boot-time helpers

The static and dynamic shared memory helpers used for boot-time
reservation/registration are non-architecture-specific. Moving
them into the

core: kernel: factor out shared memory boot-time helpers

The static and dynamic shared memory helpers used for boot-time
reservation/registration are non-architecture-specific. Moving
them into the generic boot.c file will help avoid duplicated code
and improve maintainability.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: mm: move mobj_dyn_shm.c to mm

To enable RISC-V platforms to utilize dynamic shared memory,
relocate the non-architecture-specific mobj_dyn_shm.c to the
mm directory.

Signed-off-by: Alvin Chan

core: mm: move mobj_dyn_shm.c to mm

To enable RISC-V platforms to utilize dynamic shared memory,
relocate the non-architecture-specific mobj_dyn_shm.c to the
mm directory.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: pm: sam: improve the access of variables in "at91_pm_data"

Flush the TLB before accessing variables in "at91_pm_data".
Preload the variables before using.

Signed-off-by: Tony Han <tony.han

drivers: pm: sam: improve the access of variables in "at91_pm_data"

Flush the TLB before accessing variables in "at91_pm_data".
Preload the variables before using.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: pm: sam: add code for enable/disable sama7g5 DRAM self-refresh mode

Add the header file "sama7-ddr.h" for sama7g5 DRAM controller.
Add 2 macros for enable and disable sama7g5 DRAM self-refr

drivers: pm: sam: add code for enable/disable sama7g5 DRAM self-refresh mode

Add the header file "sama7-ddr.h" for sama7g5 DRAM controller.
Add 2 macros for enable and disable sama7g5 DRAM self-refresh mode.
Enable self-refresh mode before entering the low-power modes and
disable it after exiting the low-power modes.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: pm: sam: add code for the phy of sama7g5 dram controller

Add and initilate the variable for the start address of sama7g5
dram controller phy.

Signed-off-by: Tony Han <tony.han@microchip.co

drivers: pm: sam: add code for the phy of sama7g5 dram controller

Add and initilate the variable for the start address of sama7g5
dram controller phy.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: kernel: Remove unused ta_time_offs in user_ta_ctx

It seems that "ta_time_offs" member is unused now. Thus, remove it from
user_ta_ctx structure.

Signed-off-by: Alvin Chang <alvinga@andestech.

core: kernel: Remove unused ta_time_offs in user_ta_ctx

It seems that "ta_time_offs" member is unused now. Thus, remove it from
user_ta_ctx structure.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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ci: xen: test FF-A mediator with SPMC_AT_EL=1

Add a test for Xen FF-A mediator with SPMC_AT_EL=1.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Volodymyr Babchuk <volodymyr_ba

ci: xen: test FF-A mediator with SPMC_AT_EL=1

Add a test for Xen FF-A mediator with SPMC_AT_EL=1.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: crypto: se05x: Add SCP03 keys for SE052F2

Add SCP03 default keys for SE052F2 to support OEFID 0xB501

Variant Identifier (OEF ID): B501
12NC : 9354 551 73118
Type Numb

drivers: crypto: se05x: Add SCP03 keys for SE052F2

Add SCP03 default keys for SE052F2 to support OEFID 0xB501

Variant Identifier (OEF ID): B501
12NC : 9354 551 73118
Type Number : SE052F2HN2/Z019H
Orderable Part Number : SE052F2HN2/Z019HJ

Signed-off-by: Chandni Sabharwal <chandni.sabharwal@gallagher.com>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>

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drivers: pm: sam: add code for sama7g5 LPM (Low-power Mode) pad

Set LPM pad high/low through SHDW_CR register.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklan

drivers: pm: sam: add code for sama7g5 LPM (Low-power Mode) pad

Set LPM pad high/low through SHDW_CR register.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: pm: sam: add code for save/restore sama7g5 MCK1..4 settings

Add 2 macros for save and restore sama7g5 MCK1..4 settings.
Save MCK1..4 settings before entering the low-power modes and restore

drivers: pm: sam: add code for save/restore sama7g5 MCK1..4 settings

Add 2 macros for save and restore sama7g5 MCK1..4 settings.
Save MCK1..4 settings before entering the low-power modes and restore
the settings after exiting the low-power modes.
During the low-power mode MCK1..4 use CSS=MAINCK and DIV=1.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: pm: sam: add support for checking sama7g5 MCK1..4 ready

sama5d2 has only MCK0 clock.
sama7g5 has MCK0,1,..., MCK4 clocks.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wi

drivers: pm: sam: add support for checking sama7g5 MCK1..4 ready

sama5d2 has only MCK0 clock.
sama7g5 has MCK0,1,..., MCK4 clocks.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: pm: sam: update PLLA enable/disable macros for sama7g5

Update macro "at91_plla_disable" and "at91_plla_enable" for sama7g5 PLLA.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by:

drivers: pm: sam: update PLLA enable/disable macros for sama7g5

Update macro "at91_plla_disable" and "at91_plla_enable" for sama7g5 PLLA.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-hikey: make DRAM0_SIZE and DRAM0_SIZE_NSEC configurable

DRAM0_SIZE is now defined as CFG_TZDRAM_START, allowing
for dynamic configuration.

DRAM0_SIZE_NSEC is modified to calculate the size rel

plat-hikey: make DRAM0_SIZE and DRAM0_SIZE_NSEC configurable

DRAM0_SIZE is now defined as CFG_TZDRAM_START, allowing
for dynamic configuration.

DRAM0_SIZE_NSEC is modified to calculate the size relative
to DRAM0_BASE.

Signed-off-by: Wen Bin <a1231512a@163.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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ftrace: ftrace_format.py: display seconds

When the time spent in a function is 1 second or more, display it as
seconds not milliseconds in order to keep the output nicely aligned.

Signed-off-by: Je

ftrace: ftrace_format.py: display seconds

When the time spent in a function is 1 second or more, display it as
seconds not milliseconds in order to keep the output nicely aligned.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: ltc: Fix building with mbedtls

Fix building OP-TEE with:

make PLATFORM=vexpress \
PLATFORM_FLAVOR=juno \
CFG_CRYPTOLIB_NAME=mbedtls \
CFG_CRYPTOLIB_DIR=lib/libmbedtls
...
core/

core: ltc: Fix building with mbedtls

Fix building OP-TEE with:

make PLATFORM=vexpress \
PLATFORM_FLAVOR=juno \
CFG_CRYPTOLIB_NAME=mbedtls \
CFG_CRYPTOLIB_DIR=lib/libmbedtls
...
core/lib/libtomcrypt/aes_accel.c: In function ‘aes_ctr_encrypt_nblocks’:
core/lib/libtomcrypt/aes_accel.c:182:21: error: ‘CTR_COUNTER_LITTLE_ENDIAN’ undeclared (first use in this function)
182 | if (mode == CTR_COUNTER_LITTLE_ENDIAN) {

Signed-off-by: Jacob Kroon <jacobkr@axis.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: compiler friendly 32-bit FTMN_FUNC_HASH() version

Add a more compiler friendly 32-bit implementation of FTMN_FUNC_HASH().
This gives the same output as the previous 64-bit based implementation

core: compiler friendly 32-bit FTMN_FUNC_HASH() version

Add a more compiler friendly 32-bit implementation of FTMN_FUNC_HASH().
This gives the same output as the previous 64-bit based implementation,
but base the computation on 32-bit values.

This patch reduces stack usage when compiling with
arm-linux-gnueabihf-gcc version 11.3.1 using -O0 optimization. For
example, sw_crypto_acipher_rsassa_verify() is reduced from 3616 bytes to
284 bytes.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_virt)

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core: firewall: add firewall framework

Add a generic firewall controller framework. The goal of this framework
is to offer access control and configuration APIs, that are implemented
in the firewall

core: firewall: add firewall framework

Add a generic firewall controller framework. The goal of this framework
is to offer access control and configuration APIs, that are implemented
in the firewall controllers drivers, to the firewall consumers. This
framework requires an embedded device tree.

A firewall controller is an access controller [1]. It should register
itself as a provider to the framework. Firewall controllers have the
possibility to populate their bus according to defined firewall accesses
defined in the "access-controllers" property in each of the device's
node.

Any device that consumes one or more firewall should refer it/them in
their "access-controllers" property. Arguments can be passed along with
the phandle of the firewall controller(s).

Link: https://patchwork.kernel.org/project/linux-media/patch/20240105130404.301172-2-gatien.chevallier@foss.st.com/ [1]
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: add definition for sama7g5 PMC_CPU_CKR register

The offset of "PMC CPU Clock Register" for sama7g5 is different from
the one for sama5d2.

Signed-off-by: Tony Han <tony.han@microc

drivers: clk: sam: add definition for sama7g5 PMC_CPU_CKR register

The offset of "PMC CPU Clock Register" for sama7g5 is different from
the one for sama5d2.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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