| 14c68b3c | 12-Apr-2022 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: set CFG_TEE_CORE_LOG_LEVEL to 2 (info) by default
The default log level of the TEE core is 1 (error), which means it is normally silent. Set it to 2 (info) so that the boot sequence can be see
core: set CFG_TEE_CORE_LOG_LEVEL to 2 (info) by default
The default log level of the TEE core is 1 (error), which means it is normally silent. Set it to 2 (info) so that the boot sequence can be seen (OP-TEE version banner, CPUs detected etc.).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f9e55014 | 25-Mar-2022 |
Jerome Forissier <jerome.forissier@linaro.org> |
Update CHANGELOG for 3.17.0
Update CHANGELOG for 3.17.0 and collect Tested-by tags.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> (RP
Update CHANGELOG for 3.17.0
Update CHANGELOG for 3.17.0 and collect Tested-by tags.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> (RPi3B) Tested-by: Joakim Bech <joakim.bech@linaro.org> (RPi3B-NFS) Tested-by: Neal Liu <neal_liu@aspeedtech.com> (ast2600) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sxsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8dxlevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8ulpevk) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_armv8a) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (hikey-hikey) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP) Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (rcar-salvator_m3_2x4g / virt) Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (rcar-salvator_m3_2x4g) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1012A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1028A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1088A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS2088A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1046A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1043A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS2160A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS2160A-QDS) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1, gp pkcs11) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (vexpress-qemu_virt, gp pkcs11 pager)
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| 2f291abe | 27-Jul-2020 |
Andrii Chepurnyi <andrii_chepurnyi@epam.com> |
mk/aosp_optee.mk: Provide the ability to set CROSS_COMPILE* variables
Provide the ability to set CROSS_COMPILE32/64 for AOSP build, since those may differ among different compilers.
Acked-by: Jerom
mk/aosp_optee.mk: Provide the ability to set CROSS_COMPILE* variables
Provide the ability to set CROSS_COMPILE32/64 for AOSP build, since those may differ among different compilers.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Andrii Chepurnyi <andrii_chepurnyi@epam.com>
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| d9321934 | 01-Apr-2022 |
Andrii Chepurnyi <andrii_chepurnyi@epam.com> |
Introduce OPTEE_CLANG_COMPILER_PATH variable
AOSP comes with several prebuilt clang versions. Introduce OPTEE_CLANG_COMPILER_PATH variable to be able to chose exact clang toolchain.
Acked-by: Jerom
Introduce OPTEE_CLANG_COMPILER_PATH variable
AOSP comes with several prebuilt clang versions. Introduce OPTEE_CLANG_COMPILER_PATH variable to be able to chose exact clang toolchain.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Andrii Chepurnyi <andrii_chepurnyi@epam.com>
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| 4f1712c6 | 27-Jul-2020 |
Andrii Chepurnyi <andrii_chepurnyi@epam.com> |
mk/aosp_optee.mk: introduce OPTEE_EXTRA_TA_FLAGS variable
Introduce OPTEE_EXTRA_TA_FLAGS variable to be able to pass additional variables/flags in case of TA AOSP build.
Acked-by: Jerome Forissier
mk/aosp_optee.mk: introduce OPTEE_EXTRA_TA_FLAGS variable
Introduce OPTEE_EXTRA_TA_FLAGS variable to be able to pass additional variables/flags in case of TA AOSP build.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Andrii Chepurnyi <andrii_chepurnyi@epam.com>
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| 145035ff | 23-Mar-2022 |
Imre Kis <imre.kis@arm.com> |
core: FF-A: Map TPM event log for FF-A SPs
Enable passing the TPM event log to FF-A SPs if their manifest has an "arm,tpm_event_log" compatible node. The event log is mapped to the SP's address spac
core: FF-A: Map TPM event log for FF-A SPs
Enable passing the TPM event log to FF-A SPs if their manifest has an "arm,tpm_event_log" compatible node. The event log is mapped to the SP's address space and the address and size fields are updated in the SP manifest.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Imre Kis <imre.kis@arm.com>
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| bf31bf10 | 22-Mar-2022 |
Imre Kis <imre.kis@arm.com> |
core: Enable mapping DT from secure memory
Add CFG_MAP_EXT_DT_SECURE option to enable mapping the device tree from the secure memory. As the device tree in the secure memory would only have the even
core: Enable mapping DT from secure memory
Add CFG_MAP_EXT_DT_SECURE option to enable mapping the device tree from the secure memory. As the device tree in the secure memory would only have the event log address in the secure memory the property name is changed from tpm_event_log_sm_addr to the standard tpm_event_log_addr when CFG_MAP_EXT_DT_SECURE is enabled.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Imre Kis <imre.kis@arm.com>
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| 5916069b | 24-Mar-2022 |
Ruchika Gupta <ruchika.gupta@linaro.org> |
drivers/tpm2: Add TPM2 MMIO driver
Add support for platforms that interface with TPM2 via MMIO using FIFO protocol.
Co-developed-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Victor Cho
drivers/tpm2: Add TPM2 MMIO driver
Add support for platforms that interface with TPM2 via MMIO using FIFO protocol.
Co-developed-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 952f5260 | 25-Feb-2022 |
Ruchika Gupta <ruchika.gupta@linaro.org> |
drivers/tpm2: Add basic TPM2 support in OP-TEE
TPM2 driver introduced in this commit is based on TPM TCG specification [1] & [2].
The APIs exposed allows to send commands and receive response from
drivers/tpm2: Add basic TPM2 support in OP-TEE
TPM2 driver introduced in this commit is based on TPM TCG specification [1] & [2].
The APIs exposed allows to send commands and receive response from a TPM2 chip.
[1] TCG PC Client Platform TPM Profile Specification for TPM 2.0 Vesrion 1.0.5 Revision 14 [2] TCG PC Client Device Driver Design Principles for TPM 2.0 Version 1.1 Revision 0.04
Co-developed-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 4101c34a | 08-Mar-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
mk: config.mk: describe CFG_DRIVERS_DT_RECURSIVE_PROBE
Adds a description for CFG_DRIVERS_DT_RECURSIVE_PROBE.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <e
mk: config.mk: describe CFG_DRIVERS_DT_RECURSIVE_PROBE
Adds a description for CFG_DRIVERS_DT_RECURSIVE_PROBE.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| d783b681 | 19-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver: drivers to test probe deferral
Implements driver providers for some emulated resource (clocks and reset controllers), consumer drivers and a embedded test DTSI file to test the DT_D
core: dt_driver: drivers to test probe deferral
Implements driver providers for some emulated resource (clocks and reset controllers), consumer drivers and a embedded test DTSI file to test the DT_DRIVER probe sequence.
The driver consumer run few tests and logs results locally. The result participates in core self test result reported by the PTA test interface.
One can test with vexpress platform flavor qemu_virt and qemu_v8 using, for example, the build instruction below: make PLATFORM=vexpress-qemu_virt \ CFG_DT_DRIVER_EMBEDDED_TEST=y \ CFG_EMBED_DTB_SOURCE_FILE=embedded_dtb_test.dts
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 17fd9102 | 19-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: clk: add CFG_DRIVERS_CLK_EARLY_PROBE
Adds configuration switch to allow clocks to be probed as any driver, possibly deferring initialization. This is needed when a clock driver has dependen
drivers: clk: add CFG_DRIVERS_CLK_EARLY_PROBE
Adds configuration switch to allow clocks to be probed as any driver, possibly deferring initialization. This is needed when a clock driver has dependencies on another resource.
The configuration is default enabled (CFG_DRIVERS_CLK_EARLY_PROBE=y) that is probing clock drivers before other drivers using the early_init initcall level as done prior this change.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 7e05ec25 | 27-Oct-2021 |
Jerome Forissier <jerome@forissier.org> |
core: pta: add remote attestation PTA
Add a PTA to perform remote attestation of user space TAs and TEE core memory. Enabled with CFG_ATTESTATION_PTA=y. Four commands are defined:
- PTA_ATTESTATION
core: pta: add remote attestation PTA
Add a PTA to perform remote attestation of user space TAs and TEE core memory. Enabled with CFG_ATTESTATION_PTA=y. Four commands are defined:
- PTA_ATTESTATION_GET_PUBKEY
Returns the public RSA key used to sign the measurements generated by the other commands. The key pair is generated on first call (any command) and saved to secure storage. It is therefore device-specific.
- PTA_ATTESTATION_GET_TA_SHDR_DIGEST
Returns the digest found in the secure header (struct shdr) of a TA or trusted shared library given its UUID.
- PTA_ATTESTATION_HASH_TA_MEMORY
This command must be called by a user space TA (not a CA). It computes a hash of the memory pages that belong to the caller and contain code or read-only data. This hash is therefore a runtime measurement of the TA execution environment, including shared libraries (if any). It can be used to remotely attest that the device is running untampered TA code.
- PTA_ATTESTATION_HASH_TEE_MEMORY
Returns a hash of the TEE OS core (.text and .rodata sections, less the small part of .text that may be modified at boot). Similar to PTA_ATTESTATION_HASH_TA_MEMORY, the hash is computed each time the command is called, so that the result reflects the actual memory content.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cea1eb0b | 09-Feb-2022 |
Clément Léger <clement.leger@bootlin.com> |
pta: add PTA for RTC
On some systems, when the RTC is secured, there is no way for the normal world to access it. This PTA uses the RTC API to allow a Linux OP-TEE based RTC driver to communicate wi
pta: add PTA for RTC
On some systems, when the RTC is secured, there is no way for the normal world to access it. This PTA uses the RTC API to allow a Linux OP-TEE based RTC driver to communicate with the RTC that is secured.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| f3f9432f | 10-Feb-2022 |
Clément Léger <clement.leger@bootlin.com> |
drivers: rtc: add RTC API
This API allows to interact with a RTC registered as the system RTC.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@l
drivers: rtc: add RTC API
This API allows to interact with a RTC registered as the system RTC.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 4516e38d | 14-Feb-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
assert.h: add static_assert
Adds the static_assert macro from C11.
Acked-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens W
assert.h: add static_assert
Adds the static_assert macro from C11.
Acked-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 34d244bf | 19-Jan-2022 |
Clément Léger <clement.leger@bootlin.com> |
delay: allow udelay() function to work without generic timers
sama5d2 processor is missing the optional ARM generic timers extension. In order to allow using the udelay function, add a function base
delay: allow udelay() function to work without generic timers
sama5d2 processor is missing the optional ARM generic timers extension. In order to allow using the udelay function, add a function based on a wait loop. This support needs plat_get_freq() to be implemented by the platform code and CFG_CORE_HAS_GENERIC_TIMER should be set to 'n'.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| cb60bce4 | 14-Jan-2022 |
Clément Léger <clement.leger@bootlin.com> |
drivers: wdt: add SMC handler for arm-smc-wdt Linux driver
Add SMC handler to handle SMC coming from Linux arm-smc-wdt driver. This function is meant to be called in sm_platform_handler() since CFG_
drivers: wdt: add SMC handler for arm-smc-wdt Linux driver
Add SMC handler to handle SMC coming from Linux arm-smc-wdt driver. This function is meant to be called in sm_platform_handler() since CFG_WDT_SM_HANDLER_ID is going to be defined by the platforms.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 011a8f96 | 14-Jan-2022 |
Clément Léger <clement.leger@bootlin.com> |
drivers: wdt: add watchdog interface
Add necessary code to register a system watchdog. This watchdog will then used for generic watchdog usage using a new simple watchdog interface. This interface w
drivers: wdt: add watchdog interface
Add necessary code to register a system watchdog. This watchdog will then used for generic watchdog usage using a new simple watchdog interface. This interface will be used by SMC handler which will allow handling SMC coming from the arm-smc-wdt compatible driver present in Linux.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 6b35a0ab | 02-Feb-2022 |
Ruchika Gupta <ruchika.gupta@linaro.org> |
cfg: Add restrictions with CFG_TA_PAUTH
Linux boot fails with XEN on CPU's with FEAT_PAUTH. So, CFG_TA_PAUTH currently has not been tested and is incompatible with CFG_VIRTUALIZATION.
It is also in
cfg: Add restrictions with CFG_TA_PAUTH
Linux boot fails with XEN on CPU's with FEAT_PAUTH. So, CFG_TA_PAUTH currently has not been tested and is incompatible with CFG_VIRTUALIZATION.
It is also incompatible with debug options like FTRACE and GPROF.
If these incompatible options are selected together by a platform, compilation will stop and user will be warned with an error message.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| bb329115 | 10-Jan-2022 |
Ruchika Gupta <ruchika.gupta@linaro.org> |
cfg: Add option to enable PAUTH for TA's
Add config option to enable Pointer authentication support for TA's.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Etienne Carriere <eti
cfg: Add option to enable PAUTH for TA's
Add config option to enable Pointer authentication support for TA's.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d0b742d1 | 10-Jan-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
Update CHANGELOG for 3.16.0
Update CHANGELOG for 3.16.0 and collect Tested-by tags.
Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_armv8a) Tested-by: Jerome Forissier <jerome@for
Update CHANGELOG for 3.16.0
Update CHANGELOG for 3.16.0 and collect Tested-by tags.
Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_armv8a) Tested-by: Jerome Forissier <jerome@forissier.org> (vexpress-qemu_armv8a, aarch64 host) Tested-by: Jerome Forissier <jerome@forissier.org> (hikey-hikey) Tested-by: Jerome Forissier <jerome@forissier.org> (hikey-hikey960) Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com> (Poplar) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1012A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1028A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1043A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1046A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1088A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS2088A-RDB) Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LX2160A-RDB) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sxsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8dxlevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8ulpevk) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1, gp pkcs11) Tested-by: Ricardo Salveti <ricardo@foundries.io> (ZynqMP) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (vexpress-qemu_virt, gp pkcs11) Tested-by: Sumit Garg <sumit.garg@linaro.org> (Developerbox) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d50ff941 | 19-Jan-2022 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
mk/subdir.mk: handle repositories outside the OP-TEE tree
The tags incdirs_ext and subdirs_ext allows specifying paths outside the current tree.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.
mk/subdir.mk: handle repositories outside the OP-TEE tree
The tags incdirs_ext and subdirs_ext allows specifying paths outside the current tree.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| c78b2c66 | 17-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: add reset controller framework
Adds a common reset controller framework rstctrl for interfacing reset controllers exposed by a platform.
Reset controller consumers can act on relate reset
drivers: add reset controller framework
Adds a common reset controller framework rstctrl for interfacing reset controllers exposed by a platform.
Reset controller consumers can act on relate reset level with rstctrl_assert(), rstctrl_deassert() and friends.
Reset controller consumers can claim exclusive access to the reset level woth rstctrl_get_exclusive(), rstctrl_put_exclusive().
Reset controller provider drivers call rstctrl_register_provider() to allow other drivers to get a reset control reference from a devicetree reference. Reset controller driver are identified with type DT_DRIVER_RSTCTRL.
A reset controller provider exposes struct rstctrl instances made of an opaque private reference (a private data pointer or an unsigned integer identifier), an reset controller operators reference and the exclusive claim state.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| d547c99a | 14-Dec-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
mk/config.mk: fix layout
Moves tests on CFG_DRIVERS_CLK_* config switches next to where these are assigned a default configuration value.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed
mk/config.mk: fix layout
Moves tests on CFG_DRIVERS_CLK_* config switches next to where these are assigned a default configuration value.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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