| d2c909e8 | 07-Aug-2025 |
Michael Tretter <m.tretter@pengutronix.de> |
drivers: rockchip: extract OTP driver from rk3588 platform
The OTP handling is useful outside the rk3588 platform implementation. For example, the fuses for secure boot are accessible via the OTP.
drivers: rockchip: extract OTP driver from rk3588 platform
The OTP handling is useful outside the rk3588 platform implementation. For example, the fuses for secure boot are accessible via the OTP.
Extract the OTP write and read support to a separate driver to make it available for other modules.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
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| 04c582c7 | 16-Feb-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dt-bindings: shared bindings between STM32MP25x and STM32MP23x boards
As the STM32MP23 SoC family is a derivative of the STM32MP25 SoC family, the device tree bindings can be shared as they are comp
dt-bindings: shared bindings between STM32MP25x and STM32MP23x boards
As the STM32MP23 SoC family is a derivative of the STM32MP25 SoC family, the device tree bindings can be shared as they are compatible.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 396e1f07 | 18-Jun-2025 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
drivers: gpio: add new ops configure to initialize gpio
Add the new ops configure to initialize the GPIO resource based on dt_flags. This new ops is require to support the modification of dt_flag do
drivers: gpio: add new ops configure to initialize gpio
Add the new ops configure to initialize the GPIO resource based on dt_flags. This new ops is require to support the modification of dt_flag done by caller after gpio_dt_init_by_index() and before call of gpio_configure().
It is done by example in driver of regulator fixed and gpio.
The new ops is called only in gpio_dt_cfg_by_index() or in gpio_configure() so usage of one of this API is manadatory after this patch.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 39d1e320 | 06-May-2025 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
drivers: gpio: add configure functions
Align the OP-TEE GPIO driver with GPIO lib (devm_gpiod_get_index with enum gpiod_flags) and add a way to select the GPIO configuration directly during request
drivers: gpio: add configure functions
Align the OP-TEE GPIO driver with GPIO lib (devm_gpiod_get_index with enum gpiod_flags) and add a way to select the GPIO configuration directly during request with the new function, gpio_dt_cfg_by_index().
This patch remove assumption on GPIO direction (gpio input was assumed in GPIO driver) or output level when the GPIO is requested by consumer. with this patch it must be requested explicitly with: - GPIO_IN: configure the input GPIO - GPIO_ASIS: direction is managed by caller later with gpio_set_value() call. - GPIO_OUT_LOW / GPIO_OUT_HIGH: output GPIO at expected level, the sequence for GPIO have the correct order to avoid glitch by using the gpio function at the correct order.
This patch is a preliminary step for the introduction of ops configure. The API gpio_dt_get_by_index() is keep for backward compatibility but should be used with gpio_configure() or replaced by gpio_dt_cfg_by_index().
Now gpio_configure() is only used in the 2 drivers, regulator_fixed and regulator_gpio, because in these drivers the flags gpio->dt_flags are modified after call of gpio_dt_get_by_index().
For get_voltage_level_gpio(), GPIO_OUT_HIGH is used by default as it is done in Linux function of_get_gpio_regulator_config().
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a37f67ed | 06-May-2025 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
drivers: gpio: support gpio suffix in device tree
Align the OP-TEE GPIO driver on the Linux GPIO lib behavior for the gpio properties in device tree: search "gpios" or "gpio" when gpio_name is omit
drivers: gpio: support gpio suffix in device tree
Align the OP-TEE GPIO driver on the Linux GPIO lib behavior for the gpio properties in device tree: search "gpios" or "gpio" when gpio_name is omitted and "foo-gpios" or "foo-gpio" when and if the gpio_name="foo".
This patch allows use of the function gpio_dt_get_by_index() by GPIO consumers for all supported bindings.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 143e9dce | 01-Feb-2024 |
Clément Le Goffic <clement.legoffic@foss.st.com> |
drivers: rtc: add support of alarm in RTC API
Add set_alarm and read_alarm to the RTC API to set and read an alarm.
In parallel three others functions are added: - `enable_alarm()`: Enable or not t
drivers: rtc: add support of alarm in RTC API
Add set_alarm and read_alarm to the RTC API to set and read an alarm.
In parallel three others functions are added: - `enable_alarm()`: Enable or not the alarm - `wait_alarm()`: This function is called by the non-secure world and waits until an alarm happens. The wait alarm caller is blocked until an asynchronous notification arrives. - `set_alarm_wakeup_status()`: Allow to disable or not the wakeup capability of the alarm in low power mode
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| c9c847d5 | 11-Jun-2025 |
Aleksandr Iashchenko <aleksandr.iashchenko@linutronix.de> |
core: asan: add support for custom panic callback
Add asan_set_panic_cb() to register a custom panic callback.
The ability to set a panic callback will be used in ASan tests to capture and validate
core: asan: add support for custom panic callback
Add asan_set_panic_cb() to register a custom panic callback.
The ability to set a panic callback will be used in ASan tests to capture and validate expected violations without triggering a full system panic, which is important for automated testing.
Introduce asan_report() to provide more detailed reporting of access violations, including nearby shadow memory dump.
Signed-off-by: Aleksandr Iashchenko <aleksandr.iashchenko@linutronix.de> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1e45c633 | 13-May-2025 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
clk: stm32mp21: introduce STM32MP21 clock driver
As the STM32MP25 clock driver, this driver is based on the clk-stm32-core API to manage STM32 gates, dividers, and multiplexer.
Signed-off-by: Yann
clk: stm32mp21: introduce STM32MP21 clock driver
As the STM32MP25 clock driver, this driver is based on the clk-stm32-core API to manage STM32 gates, dividers, and multiplexer.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b2ceba5a | 01-Oct-2023 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
dt-bindings: add STM32MP21 clocks and resets bindings
Add stm32mp21-clks.h, stm32mp21-clksrc.h & stm32mp21-resets.h DT bindings files for STM32MP21.
Signed-off-by: Yann Gautier <yann.gautier@foss.s
dt-bindings: add STM32MP21 clocks and resets bindings
Add stm32mp21-clks.h, stm32mp21-clksrc.h & stm32mp21-resets.h DT bindings files for STM32MP21.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| d7272dd5 | 27-May-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dt-bindings: add stm32 TAMP support
Add device tree bindings for the TAMP hardware block stm32mpxx platforms. These bindings permit the description of the configuration of tamper events.
Signed-off
dt-bindings: add stm32 TAMP support
Add device tree bindings for the TAMP hardware block stm32mpxx platforms. These bindings permit the description of the configuration of tamper events.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| d60c61e1 | 28-May-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rtc: add time stamping feature support
Support the time stamping features of the RTC. It is useful to generate a timestamp whenever a particular event occurs.
Signed-off-by: Gatien C
drivers: stm32_rtc: add time stamping feature support
Support the time stamping features of the RTC. It is useful to generate a timestamp whenever a particular event occurs.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 61bf256a | 28-May-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_gpio: add stm32_gpio_get_bank_id() helper
Add stm32_gpio_get_bank_id() helper function to get the STM32 GPIO bank ID related to its GPIO chip
Signed-off-by: Gatien Chevallier <gatien
drivers: stm32_gpio: add stm32_gpio_get_bank_id() helper
Add stm32_gpio_get_bank_id() helper function to get the STM32 GPIO bank ID related to its GPIO chip
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 990c4711 | 28-Jan-2025 |
Antonio Borneo <antonio.borneo@foss.st.com> |
core: interrupt: add set_wake for power-management wake-on on interrupt
For interrupt controllers that can handle power-management wake-up when receiving an interrupt, add the operation set_wake().
core: interrupt: add set_wake for power-management wake-on on interrupt
For interrupt controllers that can handle power-management wake-up when receiving an interrupt, add the operation set_wake().
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 6f9a4373 | 03-Jun-2025 |
Antonio Borneo <antonio.borneo@foss.st.com> |
core: kernel: dt_driver: fix copy/paste comment
While adding DT_DRIVER_PINCTRL, an incorrect word was reported by copy/paste from the existing comment for DT_DRIVER_RSTCTRL.
Drop the word 'reset' f
core: kernel: dt_driver: fix copy/paste comment
While adding DT_DRIVER_PINCTRL, an incorrect word was reported by copy/paste from the existing comment for DT_DRIVER_RSTCTRL.
Drop the word 'reset' from the comment for DT_DRIVER_PINCTRL.
Fixes: b5aff6de7052 ("core: dt_driver: add support for DT_DRIVER_PINCTRL") Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| bb49c536 | 03-Jun-2025 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
dt-bindings: align RIMU documentation with STM32MP21
Update RIF_CIDSEL_P and RIF_CIDSEL_M defines to be align with STM32MP21.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-b
dt-bindings: align RIMU documentation with STM32MP21
Update RIF_CIDSEL_P and RIF_CIDSEL_M defines to be align with STM32MP21.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 9132973c | 21-Feb-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dt-bindings: add STM32MP21x shared bindings
Adds STM32MP21x SoC family bindings that share STM32MP25 RISAF bindings.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by:
dt-bindings: add STM32MP21x shared bindings
Adds STM32MP21x SoC family bindings that share STM32MP25 RISAF bindings.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 19bcbfd1 | 28-May-2025 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
dt-bindings: add STM32MP21 RIFSC bindings
Add STM32MP21 specific RIFSC bindings.
Co-developed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevalli
dt-bindings: add STM32MP21 RIFSC bindings
Add STM32MP21 specific RIFSC bindings.
Co-developed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| bd8bea6f | 23-May-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: boot_mem: enable asan support
Add boot_mem_init_asan() to tag all allocated memory with asan_tag_access().
Allocations with boot_mem_alloc() and boot_mem_alloc_tmp() are tagged with asan_tag_
core: boot_mem: enable asan support
Add boot_mem_init_asan() to tag all allocated memory with asan_tag_access().
Allocations with boot_mem_alloc() and boot_mem_alloc_tmp() are tagged with asan_tag_access().
boot_mem_foreach_padding() temporarily allow access to paddings for the callback and restores no-access if the callback returns false to tell that the padding wasn't consumed.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| bb538722 | 02-Jun-2025 |
Alvin Chang <alvinga@andestech.com> |
core: replace CFG_DYN_STACK_CONFIG with CFG_DYN_CONFIG
This commit replaces CFG_DYN_STACK_CONFIG with CFG_DYN_CONFIG since now RISC-V also supports CFG_DYN_STACK_CONFIG.
Signed-off-by: Alvin Chang
core: replace CFG_DYN_STACK_CONFIG with CFG_DYN_CONFIG
This commit replaces CFG_DYN_STACK_CONFIG with CFG_DYN_CONFIG since now RISC-V also supports CFG_DYN_STACK_CONFIG.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b61cea09 | 05-Feb-2025 |
Valentin Caron <valentin.caron@foss.st.com> |
scmi-server: configure clock service from DT
scmi_server_scpfw can now retrieve clocks description from DT.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Acked-by: Jerome Forissier <je
scmi-server: configure clock service from DT
scmi_server_scpfw can now retrieve clocks description from DT.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b63e12e4 | 21-May-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dt-bindings: update LTDC layer numbers on stm32mp2x platforms
On stm32mp2x platforms, according to the reference manual, the LTDC layers are named L1/2/3, not L0/1/2.
Signed-off-by: Gatien Chevalli
dt-bindings: update LTDC layer numbers on stm32mp2x platforms
On stm32mp2x platforms, according to the reference manual, the LTDC layers are named L1/2/3, not L0/1/2.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e1482ae7 | 15-Mar-2025 |
Yu-Chien Peter Lin <peter.lin@sifive.com> |
core: mm: fix va to index calculation for RV64
On RV64, shifting va is not enough when top bits are present in the virtual address, e.g. for Sv48, bits 63-48 must be set when bit 47 is set to form a
core: mm: fix va to index calculation for RV64
On RV64, shifting va is not enough when top bits are present in the virtual address, e.g. for Sv48, bits 63-48 must be set when bit 47 is set to form a valid virtual address.
In this case, we need to mask the base-level virtual addresses to clear any extended bits before calculating the index.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com> Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Alvin Chang <alvinga@andestech.com>
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| 232f1cde | 08-Mar-2025 |
Yu-Chien Peter Lin <peter.lin@sifive.com> |
core: mm: refactor ASLR mapping for architecture support
To allow adding RISC-V ASLR support, add arch_aslr_base_addr() which will be used to apply architecture specific ASLR base calculation.
Sign
core: mm: refactor ASLR mapping for architecture support
To allow adding RISC-V ASLR support, add arch_aslr_base_addr() which will be used to apply architecture specific ASLR base calculation.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com> Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Alvin Chang <alvinga@andestech.com>
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| a7f2d4bd | 12-May-2023 |
Antonio Borneo <antonio.borneo@foss.st.com> |
drivers: wdt: add implementation of SMCWD_GET_TIMELEFT
Implement watchdog SMC service SMCWD_GET_TIMELEFT that is optional and allows non-secure world to get information on watchdog state. The servic
drivers: wdt: add implementation of SMCWD_GET_TIMELEFT
Implement watchdog SMC service SMCWD_GET_TIMELEFT that is optional and allows non-secure world to get information on watchdog state. The service is supported by new watchdog driver operation handler get_timeleft.
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| c501c3e1 | 18-Dec-2023 |
Lionel Debieve <lionel.debieve@foss.st.com> |
drivers: stm32_iwdg: remove OTP access in driver
Now we know if the watchdog is running by reading the hardware, there is no need to read the OTP fuses related to the watchdog. This allows removing
drivers: stm32_iwdg: remove OTP access in driver
Now we know if the watchdog is running by reading the hardware, there is no need to read the OTP fuses related to the watchdog. This allows removing platform function stm32_get_iwdg_otp_config() and consequently stm32_iwdg.h header file.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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