core: panic() macro accepts zero or one string argument.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jen.wiklander@linaro.org>
Reviewed-by: Etienne Car

core: panic() macro accepts zero or one string argument.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jen.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (QEMU)

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core: remove TEE_ASSERT()

TEE_ASSERT() can be confusing regarding assert() as assert() can
be disabled through NDEBUG while TEE_ASSERT() can't.
Instead one should explicitly implement "if (cond) { p

core: remove TEE_ASSERT()

TEE_ASSERT() can be confusing regarding assert() as assert() can
be disabled through NDEBUG while TEE_ASSERT() can't.
Instead one should explicitly implement "if (cond) { panic(); }"

This patch removes several inclusions on tee_common_unpg.h as it
used to define TEE_ASSERT() that has been removed.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jen.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (QEMU)

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Add UART driver for Hisilicon Hi16xx

Applies to SoCs in the Hi16xx family, and to Phosphor V660 a.k.a. hip05
(the CPU on the Hisilicon D02 development board).

Signed-off-by: Jerome Forissier <jerom

Add UART driver for Hisilicon Hi16xx

Applies to SoCs in the Hi16xx family, and to Phosphor V660 a.k.a. hip05
(the CPU on the Hisilicon D02 development board).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>

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storage: encrypt the FEK with a TA-specific key

The File Encryption Key is now encrypted with a Trusted application
Storage Key (TSK) rather than directly with the Secure Storage Key.
The TSK is der

storage: encrypt the FEK with a TA-specific key

The File Encryption Key is now encrypted with a Trusted application
Storage Key (TSK) rather than directly with the Secure Storage Key.
The TSK is derived from the SSK and the TA UUID. This improves
isolation between TAs, and makes it impossible to read the data of a
TA from another TA after manually moving files in the REE filesystem
for instance.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>

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gpio/pl061: add get/set interrupt and mode control functions

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jerome Forissier <je

gpio/pl061: add get/set interrupt and mode control functions

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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gpio: support multiple instances

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

drivers: add spi framework and pl022 driver

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklan

drivers: add spi framework and pl022 driver

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: pager replace TEE_PAGER_AREA_* with TEE_MATTR_*

Replaces TEE_PAGER_AREA_* attributes with corresponding
TEE_MATTR_* attributes.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Sig

core: pager replace TEE_PAGER_AREA_* with TEE_MATTR_*

Replaces TEE_PAGER_AREA_* attributes with corresponding
TEE_MATTR_* attributes.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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io.h: add io_mask{8,16,32} functions

When writing peripheral drivers, there's very often a need to read a
register value, set/clear some bits and then write the new value
back. Instead of having to

io.h: add io_mask{8,16,32} functions

When writing peripheral drivers, there's very often a need to read a
register value, set/clear some bits and then write the new value
back. Instead of having to 'manually' call read, do bit manipulations
and write every single time, add this helper function for convenience.

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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core: mask interrupts at assert or panic()

Masks interrupts at assert or panic() to keep the cpu pinned.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklan

core: mask interrupts at assert or panic()

Masks interrupts at assert or panic() to keep the cpu pinned.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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ltc: provide rng_generate()

Adds rng_generate() to the tee_crypt_provider interface to be used by
pager and early initialization code where the complete crypto library
might not be available.

Revie

ltc: provide rng_generate()

Adds rng_generate() to the tee_crypt_provider interface to be used by
pager and early initialization code where the complete crypto library
might not be available.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fix race to allocate secure buffer

Fixes race to allocate secure buffer for TA to TA communication.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander

core: fix race to allocate secure buffer

Fixes race to allocate secure buffer for TA to TA communication.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: struct tee_ta_session: remove calling_sess

Removes calling_sess from struct tee_ta_session as the information is
available via link_tsd instead.

Reviewed-by: Joakim Bech <joakim.bech@linaro.o

core: struct tee_ta_session: remove calling_sess

Removes calling_sess from struct tee_ta_session as the information is
available via link_tsd instead.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: replace tee_ta_set_current_session()

Replace tee_ta_set_current_session() with tee_ta_push_current_session()
and tee_ta_pop_current_session() to set and restore the current session
in a stack

core: replace tee_ta_set_current_session()

Replace tee_ta_set_current_session() with tee_ta_push_current_session()
and tee_ta_pop_current_session() to set and restore the current session
in a stack like fashion.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: update tee_svc_copy_{to,from}_user

Removes the sess parameter to tee_svc_copy_to_user(),
tee_svc_copy_from_user() and tee_svc_copy_kaddr_to_uref() as it's always
passed as either NULL or curre

core: update tee_svc_copy_{to,from}_user

Removes the sess parameter to tee_svc_copy_to_user(),
tee_svc_copy_from_user() and tee_svc_copy_kaddr_to_uref() as it's always
passed as either NULL or current session.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Add support for Spreadtrum SC9860(alias whale2) board

make PLATFORM=sprd-sc9860 [CFG_ARM64_core=y]

Signed-off-by: Aijun Sun <aijun.sun@spreadtrum.com>
Reviewed-by: Jerome Forissier <jerome.forissie

Add support for Spreadtrum SC9860(alias whale2) board

make PLATFORM=sprd-sc9860 [CFG_ARM64_core=y]

Signed-off-by: Aijun Sun <aijun.sun@spreadtrum.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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core: pl011: add define for register size

Adds define for PL011 register size.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: gic: add define for register size

Adds defines for GIC register size.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: refactor memory map initialization

Refactors memory map initialization by replacing struct map_area with
struct tee_mmap_region to avoid one intermediate format of the memory
map.

Reviewed-by

core: refactor memory map initialization

Refactors memory map initialization by replacing struct map_area with
struct tee_mmap_region to avoid one intermediate format of the memory
map.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Removing legacy pub_ddr init code

Secure side doesn't manage anything related to the public DDR any longer
and therefore the complete memory area as defined in TEE core shall be
available to the non

Removing legacy pub_ddr init code

Secure side doesn't manage anything related to the public DDR any longer
and therefore the complete memory area as defined in TEE core shall be
available to the non-secure side (i.e., Linux kernel).

Signed-off-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Joakim Bech <joakim.bech@linaro.org>
Suggested-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: fix tee object attribute management

Prior to the patch the attribute management of tee objects occasionally
assumed that the attribute data didn't contain any addresses. This
assumption is inc

core: fix tee object attribute management

Prior to the patch the attribute management of tee objects occasionally
assumed that the attribute data didn't contain any addresses. This
assumption is incorrect for asymmetric key objects. This patch fixes
that by introducing an operation struct for each basic attribute type.

Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Add Cadence UART driver

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Revi

Add Cadence UART driver

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: add gpio framework and pl061 driver

Suggested-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklande

drivers: add gpio framework and pl061 driver

Suggested-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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core: remove kmap interface

Removes kmap interface as the secure DDR memory is mapped already.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@li

core: remove kmap interface

Removes kmap interface as the secure DDR memory is mapped already.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: secure storage: dual filesystems support

Adds support for multiple filesystems by keeping a pointer to
tee_file_operations in the tee_pobj and tee_storage_enum structures.

Two identifiers are

core: secure storage: dual filesystems support

Adds support for multiple filesystems by keeping a pointer to
tee_file_operations in the tee_pobj and tee_storage_enum structures.

Two identifiers are added to the API to be used as the storage_id
parameter, so that TAs may dynamically choose the filesystem:
- TEE_STORAGE_PRIVATE_REE (requires CFG_REE_FS=y)
- TEE_STORAGE_PRIVATE_RPMB (requires CFG_RPMB_FS=y)
The value TEE_STORAGE_PRIVATE will select the REE FS if available,
otherwise RPMB. At least one FS has to be enabled at build time. Only
the REE filesystem is enabled by default.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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