| f354a5d8 | 05-Apr-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
core: replace _fdt_ prefix with fdt_ for device tree API
As per upstream discussion, there is no reason to keep _fdt_ prefix. Replaces it with fdt_ for all occurrences.
Signed-off-by: Gatien Cheval
core: replace _fdt_ prefix with fdt_ for device tree API
As per upstream discussion, there is no reason to keep _fdt_ prefix. Replaces it with fdt_ for all occurrences.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| e7a2db34 | 14-Mar-2023 |
Clément Léger <clement.leger@bootlin.com> |
core: dt_driver: add support for DT_DRIVER_I2C
Integrating I2C support within the dt_driver mechanism require to change the way controller are retrieved. Indeed, when using i2c, the children are loc
core: dt_driver: add support for DT_DRIVER_I2C
Integrating I2C support within the dt_driver mechanism require to change the way controller are retrieved. Indeed, when using i2c, the children are located under a parent I2C controller node. This implies to use another method to parse node heriarchy and ignore the case when the provider has no phandle.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 33cc94df | 13-Mar-2023 |
Clément Léger <clement.leger@bootlin.com> |
core: dt_driver: add phandle node and fdt to dt_driver_phandle_args
With pinctrl, it is necessary for the provider to access the node which will need to be apply since it contains custom controller
core: dt_driver: add phandle node and fdt to dt_driver_phandle_args
With pinctrl, it is necessary for the provider to access the node which will need to be apply since it contains custom controller properties that need to be parsed. In order to integrate pinctrl with the existing dt_driver generic support, add these members and fill them when invoking the get_of_device() callback.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 809fa817 | 10-Feb-2023 |
Balint Dobszay <balint.dobszay@arm.com> |
core: ffa: add TOS_FW_CONFIG handling
At boot TF-A passes two DT addresses (HW_CONFIG and TOS_FW_CONFIG), but currently only the HW_CONFIG address is saved, the other one is dropped. This commit add
core: ffa: add TOS_FW_CONFIG handling
At boot TF-A passes two DT addresses (HW_CONFIG and TOS_FW_CONFIG), but currently only the HW_CONFIG address is saved, the other one is dropped. This commit adds functionality to save the TOS_FW_CONFIG too, so we can retrieve it later. This is necessary for the CFG_CORE_SEL1_SPMC use case, because the SPMC manifest is passed in this DT.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| b76b2296 | 03-Feb-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
virt: rename CFG_VIRTUALIZATION to CFG_NS_VIRTUALIZATION
With the advent of virtualization support at S-EL2 in the Armv8.4-A architecture, CFG_VIRTUALIZATION has become ambiguous. Let's rename it to
virt: rename CFG_VIRTUALIZATION to CFG_NS_VIRTUALIZATION
With the advent of virtualization support at S-EL2 in the Armv8.4-A architecture, CFG_VIRTUALIZATION has become ambiguous. Let's rename it to CFG_NS_VIRTUALIZATION to indicate more clearly that it is about supporting virtualization on the non-secure side.
This commit is the result of the following command:
$ for f in $(git grep -l -w CFG_VIRTUALIZATION); do \ sed -i -e 's/CFG_VIRTUALIZATION/CFG_NS_VIRTUALIZATION/g' $f; \ done
...plus the compatibility line in mk/config.mk:
CFG_NS_VIRTUALIZATION ?= $(CFG_VIRTUALIZATION)
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
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| af78e1b1 | 24-Oct-2022 |
Imre Kis <imre.kis@arm.com> |
ldelf: Provide access to TS load address
Propagate ELF load address from ldelf to user mode context as a preparation for load address relative memory regions.
Signed-off-by: Imre Kis <imre.kis@arm.
ldelf: Provide access to TS load address
Propagate ELF load address from ldelf to user mode context as a preparation for load address relative memory regions.
Signed-off-by: Imre Kis <imre.kis@arm.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| fc82e622 | 19-Dec-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: finalize scall layer
Finalizes the new scall layer by renaming remaining files so the generic scall layer resides in core/include/kernel/scall.h and core/kernel/scall.c.
New architectures are
core: finalize scall layer
Finalizes the new scall layer by renaming remaining files so the generic scall layer resides in core/include/kernel/scall.h and core/kernel/scall.c.
New architectures are expected to provide a core/arch/arm/include/kernel/arch_scall.h with functions needed to deal with the architecture specific struct thread_scall_regs usage in core/kernel/scall.c.
New architectures are also expected to provide an implementation of scall_save_panic_stack() called from scall_sys_return_helper().
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ab5363c6 | 19-Dec-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: introduce scall layer from svc parts
Introduces a scall layer by renaming various thread_svc* names and _*handle_svc() functions and function pointers as a first step in doing architecture neu
core: introduce scall layer from svc parts
Introduces a scall layer by renaming various thread_svc* names and _*handle_svc() functions and function pointers as a first step in doing architecture neutral syscall processing.
The name scall is used instead of syscall since the syscall_ prefix is reserved for the functions implementing the actual syscall. While scall is the infrastructure used to reach the syscall functions.
No files are renamed and removed at this stage. This patch doesn't change any behaviour.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b6095989 | 10-Jan-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver: fix inline comment regarding clock references
Fixes inline description comments for get_of_device_func typedef and functions dt_driver_device_from_node_idx_prop() and fdt_get_dt_dri
core: dt_driver: fix inline comment regarding clock references
Fixes inline description comments for get_of_device_func typedef and functions dt_driver_device_from_node_idx_prop() and fdt_get_dt_driver_cells() as they do not only relate to clock drivers.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 0adca93a | 04-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
core: dt_driver: differentiate error codes if property is not found
Differentiates error codes in dt_driver_device_from_node_idx_prop() if the requested resource is not found by returning TEE_ERROR_
core: dt_driver: differentiate error codes if property is not found
Differentiates error codes in dt_driver_device_from_node_idx_prop() if the requested resource is not found by returning TEE_ERROR_ITEM_NOT_FOUND. This is useful to differentiate cases for optional properties in drivers.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| c67c4c8d | 01-Dec-2022 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: kernel: delay: sort-out architecture-independant code from arch dir
This commit moves core/arch/arm/kernel/delay.c to core/kernel/delay.c. Keeps architecture-dependant code in core/arch/$ARCH/
core: kernel: delay: sort-out architecture-independant code from arch dir
This commit moves core/arch/arm/kernel/delay.c to core/kernel/delay.c. Keeps architecture-dependant code in core/arch/$ARCH/include/kernel/delay_arch.h and moves generic functions to core/include/kernel/delay.h
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 45507d10 | 18-Nov-2022 |
Khoa Hoang <admin@khoahoang.com> |
Add support for compiler stack protector
This change add support for CFG_CORE_STACK_PROTECTOR{,_STRONG,_ALL} and CFG_TA_STACK_PROTECTOR{,_STRONG,_ALL}. This flag enable the compiler stack overflow p
Add support for compiler stack protector
This change add support for CFG_CORE_STACK_PROTECTOR{,_STRONG,_ALL} and CFG_TA_STACK_PROTECTOR{,_STRONG,_ALL}. This flag enable the compiler stack overflow protection feature -fstack-protector* and also generate random stack canary value on kernel boot and TA entry.
Weak function plat_get_random_stack_canary() can be override by platform to provide random stack canary value for the core kernel.
Signed-off-by: Khoa Hoang <admin@khoahoang.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f1badf16 | 17-Nov-2022 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: include: cache_helpers.h: allow reusing architecture-dependent code
To allow reuse of architecture-dependent code, divide original cache_helpers.h into two separate header files core/$arch/inc
core: include: cache_helpers.h: allow reusing architecture-dependent code
To allow reuse of architecture-dependent code, divide original cache_helpers.h into two separate header files core/$arch/include/kernel/cache_helpers_arch.h and core/include/kernel/cache_helpers.h
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> [jf: set author to be same as Signed-off-by:] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 4e9ed1a9 | 17-Nov-2022 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: include: misc.h: divide into misc.h and misc_arch.h
get_core_pos() is architecture-independent function and could be re-used by an arch implementation, therefore, move it to a separate header
core: include: misc.h: divide into misc.h and misc_arch.h
get_core_pos() is architecture-independent function and could be re-used by an arch implementation, therefore, move it to a separate header file core/include/kernel/misc.h, and, keep architecture-dependent code in core/$arch/include/kernel/misc_arch.h
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> [jf: set author to be same as Signed-off-by:] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 7e75ca54 | 01-Apr-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
Basic fault mitigation routines
Adds basic fault mitigation routines designed to help protecting from fault injection attacks on the hardware. This is by no means bullet proof, but it should at leas
Basic fault mitigation routines
Adds basic fault mitigation routines designed to help protecting from fault injection attacks on the hardware. This is by no means bullet proof, but it should at least improve the situation.
These routines focus on verifying that a function has been called and that the returned value matches the result from the function. This is done by having a handshake between the caller and the callee where also the return value is transmitted in a separate channel.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cb94c145 | 21-Oct-2022 |
Weizhao Jiang <weizhaoj@amazon.com> |
core: implement a method to dump user TA runtime status
This patch is to dump user TA runtime status for debug purposes. The change includes: 1. Add new command (STATS_CMD_TA_STATS) in the stats PTA
core: implement a method to dump user TA runtime status
This patch is to dump user TA runtime status for debug purposes. The change includes: 1. Add new command (STATS_CMD_TA_STATS) in the stats PTA. 2. Add tee_ta_dump_stats() to scan all ongoing TA instance and sessions and snapshot their status. 3. Add new function: entry_dump_memstats() to __utee_entry() to get TA heap statistics. 4. Add new compile option (CFG_TA_STATS, default n) to enable this feature.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Weizhao Jiang <weizhaoj@amazon.com> Signed-off-by: Weizhao Jiang <weizhaoj@amazon.com> [jf: edit commit message] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 5a5586ec | 28-Oct-2022 |
Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> |
core: Add new helper get_secure_dt()
Add new helper to query device tree considered secure for device driver usage.
First priority is given to embedded device tree if present.
If system is configu
core: Add new helper get_secure_dt()
Add new helper to query device tree considered secure for device driver usage.
First priority is given to embedded device tree if present.
If system is configured with secure external device tree location then external device tree is returned.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| a5d5bbc8 | 25-Mar-2022 |
Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> |
core: dt: Make it possible to alter device mapping
In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device
core: dt: Make it possible to alter device mapping
In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device.
When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly.
This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| e17e7a56 | 07-Jun-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: move pgt_cache to struct user_mode_ctx
Moves pgt_cache from struct thread_specific_data to struct user_mode_ctx.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome F
core: move pgt_cache to struct user_mode_ctx
Moves pgt_cache from struct thread_specific_data to struct user_mode_ctx.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 93dc6b29 | 23-Sep-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add pointer authentication support
Previously pointer authentication was only supported for TAs. With this patch add a configuration option CFG_CORE_PAUTH to enable support for core. Each priv
core: add pointer authentication support
Previously pointer authentication was only supported for TAs. With this patch add a configuration option CFG_CORE_PAUTH to enable support for core. Each privileged thread has its own APIA key. There are also a separate APIA key for each physical core used when handling an abort or when using the tmp stack.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4682bf0f | 30-Apr-2022 |
Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> |
core: add allocator for cache aligned memory
Provides new common maximum cache line aligned allocator for allocating memory to be used when communicating with different peripherals within the CPU.
core: add allocator for cache aligned memory
Provides new common maximum cache line aligned allocator for allocating memory to be used when communicating with different peripherals within the CPU.
Allocated memory can be readily used with cache maintenance operations.
This is based on core/drivers/imx/dcp/dcp_utils.c.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b8da5d8c | 04-Apr-2022 |
Ruchika Gupta <ruchika.gupta@linaro.org> |
core: Add support to parse TPM eventlog and extend PCRs
Support for OP-TEE to parse the TPM eventlog. The eventlog format is based on TCG specification [1], so we call this TCG framework.
To parse
core: Add support to parse TPM eventlog and extend PCRs
Support for OP-TEE to parse the TPM eventlog. The eventlog format is based on TCG specification [1], so we call this TCG framework.
To parse the eventlog and extend PCR's device is needed which supports PCR's. This device can be TPM or any other HSM which supports PCR like registers. Such a device can register itself as a TCG provider for PCR information and ability to extend the PCR's.
[1] TCG PC Client Platform Firmware Profile Specification link: https://trustedcomputinggroup.org/resource/pc-client-specific-platform-firmware-profile-specification/
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| a0e8ffe9 | 04-Apr-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add support for MTE
Adds support for the Armv8.5-A Memory Tagging Extension with CFG_MEMTAG=y.
A memtag.h API is introduced to handle this extension. If CFG_MEMTAG=n the API doesn't add any o
core: add support for MTE
Adds support for the Armv8.5-A Memory Tagging Extension with CFG_MEMTAG=y.
A memtag.h API is introduced to handle this extension. If CFG_MEMTAG=n the API doesn't add any overhead and the behaviour is unchanged. With CFG_MEMTAG=y a check is performed to see if the platform can support MTE and the API is dynamically configured accordingly. This means that it's safe to have CFG_MEMTAG=y even for platforms not supporting MTE. There will be some minimal overhead then, but likely not noticeable.
An entry is also added in the TEE_PROPSET_TEE_IMPLEMENTATION for a u32 property "org.trustedfirmware.optee.cpu.feat_memtag_implemented". The property is set to a non-zero value only if CFG_CORE_MEMTAG is configured and the underlying CPU supports FEAT_MTE.
This commit still only uses the default tag with the value 0 resulting in unchanged pointers when accessing memory. However, all plumbing is in place allowing for instance tagging of the heap in a later commit.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 145035ff | 23-Mar-2022 |
Imre Kis <imre.kis@arm.com> |
core: FF-A: Map TPM event log for FF-A SPs
Enable passing the TPM event log to FF-A SPs if their manifest has an "arm,tpm_event_log" compatible node. The event log is mapped to the SP's address spac
core: FF-A: Map TPM event log for FF-A SPs
Enable passing the TPM event log to FF-A SPs if their manifest has an "arm,tpm_event_log" compatible node. The event log is mapped to the SP's address space and the address and size fields are updated in the SP manifest.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Imre Kis <imre.kis@arm.com>
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| d783b681 | 19-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver: drivers to test probe deferral
Implements driver providers for some emulated resource (clocks and reset controllers), consumer drivers and a embedded test DTSI file to test the DT_D
core: dt_driver: drivers to test probe deferral
Implements driver providers for some emulated resource (clocks and reset controllers), consumer drivers and a embedded test DTSI file to test the DT_DRIVER probe sequence.
The driver consumer run few tests and logs results locally. The result participates in core self test result reported by the PTA test interface.
One can test with vexpress platform flavor qemu_virt and qemu_v8 using, for example, the build instruction below: make PLATFORM=vexpress-qemu_virt \ CFG_DT_DRIVER_EMBEDDED_TEST=y \ CFG_EMBED_DTB_SOURCE_FILE=embedded_dtb_test.dts
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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