| #
7a1f6540 |
| 22-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_uart: remove registering to shared_resources driver
Remove registering of STM32 UART driver to shared_resources driver that is deprecated since integration of the firewall framework a
drivers: stm32_uart: remove registering to shared_resources driver
Remove registering of STM32 UART driver to shared_resources driver that is deprecated since integration of the firewall framework and will soon be removed.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
48f71fb5 |
| 23-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_uart: remove use of shared_resource for pinctlr
Remove use of shared_resources platform driver to manage the secure state of the pins of a pinctrl state since this is now managed usin
drivers: stm32_uart: remove use of shared_resource for pinctlr
Remove use of shared_resources platform driver to manage the secure state of the pins of a pinctrl state since this is now managed using the firewall framework.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
e7592b00 |
| 23-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_uart: remove use of stm32_pinctrl_set_secure_cfg()
Remove use of stm32_pinctrl_set_secure_cfg() to set the secure state of the pins of a pinctrl state since this is now handled from S
drivers: stm32_uart: remove use of stm32_pinctrl_set_secure_cfg()
Remove use of stm32_pinctrl_set_secure_cfg() to set the secure state of the pins of a pinctrl state since this is now handled from STM32 GPIO driver based on the firewall framework.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
58686f11 |
| 12-Jan-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_uart: fix incorrect USART_ISR_TXFE value
USART_ISR_TXFE indicates that the FIFO is empty. The register offset is BIT(23), not BIT(27).
Signed-off-by: Gatien Chevallier <gatien.cheval
drivers: stm32_uart: fix incorrect USART_ISR_TXFE value
USART_ISR_TXFE indicates that the FIFO is empty. The register offset is BIT(23), not BIT(27).
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
bd1fffe5 |
| 30-Oct-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: add new platform support
Initial configuration for STM32MP2x platforms. Add the initial memory layout and the MMU bus reference addresses. Default RAM size is 4GBytes It adds also the
plat-stm32mp2: add new platform support
Initial configuration for STM32MP2x platforms. Add the initial memory layout and the MMU bus reference addresses. Default RAM size is 4GBytes It adds also the console initialization and GIC support.
There are no shared resources on STM32MP25x platforms. Use stm32_pinctrl_set_secure_cfg() API in the STM32 UART driver for now.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
def163ea |
| 25-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_uart: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
drivers: stm32_uart: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
5b84bbd5 |
| 23-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_uart: support CFG_DRIVERS_PINCTRL
Updates stm32_uart driver for when CFG_DRIVERS_PINCTRL is enabled making UART driver to get pin control configuration using the generic pin control f
drivers: stm32_uart: support CFG_DRIVERS_PINCTRL
Updates stm32_uart driver for when CFG_DRIVERS_PINCTRL is enabled making UART driver to get pin control configuration using the generic pin control framework.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
f354a5d8 |
| 05-Apr-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
core: replace _fdt_ prefix with fdt_ for device tree API
As per upstream discussion, there is no reason to keep _fdt_ prefix. Replaces it with fdt_ for all occurrences.
Signed-off-by: Gatien Cheval
core: replace _fdt_ prefix with fdt_ for device tree API
As per upstream discussion, there is no reason to keep _fdt_ prefix. Replaces it with fdt_ for all occurrences.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
cf8bb459 |
| 10-Jan-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_*: remove code for when DT is not supported
This change removes implementation managing cases when CFG_EMBED_DTB or CFG_DT are disabled. This change aims to simplify source files and
drivers: stm32_*: remove code for when DT is not supported
This change removes implementation managing cases when CFG_EMBED_DTB or CFG_DT are disabled. This change aims to simplify source files and is related to commit [1] from which stm32mp1 platform requires DTB for the drivers configuration.
Link: [1] 474ad1856b56 ("plat-stm32mp1: conf: mandate the use of device tree on STM32MP1x platforms") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
5e369f14 |
| 18-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_uart: use generic clock API
Replaces use of ST specific stm32mp_clk_xxx() clocks functions in favor to OP-TEE generic clock API functions clk_xxx() using struct clk * as clock referen
drivers: stm32_uart: use generic clock API
Replaces use of ST specific stm32mp_clk_xxx() clocks functions in favor to OP-TEE generic clock API functions clk_xxx() using struct clk * as clock references. Updates STM32 UART driver and platform stm32mp1 console support.
Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
3ae6a7d7 |
| 03-Nov-2021 |
Lionel Debieve <lionel.debieve@foss.st.com> |
drivers: stm32_uart: use reg_size to map virtual addresses
Use the register map size from the dt_node_info structure to call the phys_to_virt() function.
Signed-off-by: Lionel Debieve <lionel.debie
drivers: stm32_uart: use reg_size to map virtual addresses
Use the register map size from the dt_node_info structure to call the phys_to_virt() function.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
c2e4eb43 |
| 23-May-2021 |
Anton Rybakov <a.rybakov@omp.ru> |
core_mmu: fix phys_to_virt() to check length
phys_to_virt() function without length parameter doesn`t always have ability to find the correct mapping for requested physical address. This is because
core_mmu: fix phys_to_virt() to check length
phys_to_virt() function without length parameter doesn`t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesn`t have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary.
core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled.
Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)
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| #
3639b55f |
| 04-May-2020 |
Jerome Forissier <jerome@forissier.org> |
core: rename KEEP_INIT() and KEEP_PAGER()
The KEEP_INIT() and KEEP_PAGER() macros are quite often used in C files immediately after the definition of a function or a structure without a blank line i
core: rename KEEP_INIT() and KEEP_PAGER()
The KEEP_INIT() and KEEP_PAGER() macros are quite often used in C files immediately after the definition of a function or a structure without a blank line in between. This style mimics what the Linux kernel does for a similar use cases: EXPORT_SYMBOL().
Unfortunately, the checkpatch.pl tool expects a blank line after structure and function definitions, except for a few special cases such as EXPORT_SYMBOL(). As a result we often get unwanted warnings when we use KEEP_INIT() and KEEP_PAGER(). Among the exceptions are all words starting with DECLARE_ or DEFINE_, so by renaming our macros we could avoid the checkpatch warnings.
This commit renames KEEP_INIT() and KEEP_PAGER() to DECLARE_KEEP_INIT() and DECLARE_KEEP_PAGER(), respectively. The assembler macros are also renamed for consistency. No functional change is expected.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
082f27ae |
| 03-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_uart: pin control with stm32_gpio
stm32_uart instance get related pins configuration from device tree content.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Foris
stm32_uart: pin control with stm32_gpio
stm32_uart instance get related pins configuration from device tree content.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
9d8a03df |
| 03-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_uart: register secure/non-secure device
stm32_uart instance registers as secure/non-secure resources according to device tree content.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com
stm32_uart: register secure/non-secure device
stm32_uart instance registers as secure/non-secure resources according to device tree content.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
63c46642 |
| 04-Apr-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_uart: assert clock and register base address
Assert clock and UART base address were found from DTB instead of panicking. This can help debugging. Invalid clock or iomem base address already l
stm32_uart: assert clock and register base address
Assert clock and UART base address were found from DTB instead of panicking. This can help debugging. Invalid clock or iomem base address already lead to core panic, an assertion here is far enough.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
c0c3a020 |
| 15-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_uart: make all local variable be initialized
Update stm32_uart driver to conform with OP-TEE directive about local variables initialization.
Signed-off-by: Etienne Carriere <etienne.carriere@
stm32_uart: make all local variable be initialized
Update stm32_uart driver to conform with OP-TEE directive about local variables initialization.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
918bb3a5 |
| 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former function are about to be deprecated in favor to the later.
T
core: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former function are about to be deprecated in favor to the later.
This change upgrades core generic code and drivers. At some place, io_clrbitsX(), io_setbitsX() and io_clrsetbitsX() replace the writeX(readX() ...) operations when obvious.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
87fdf271 |
| 08-Jan-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_uart: API to init console bus from a DTB
Introduce stm32_uart_init_from_dt_node() that initializes an UART device from the given DT node. The function returns the reference to the created UART
stm32_uart: API to init console bus from a DTB
Introduce stm32_uart_init_from_dt_node() that initializes an UART device from the given DT node. The function returns the reference to the created UART instance.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Joakim Bech <joakim.bech@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
107d5ec2 |
| 08-Jan-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_uart: rename exported structure and add secure flag
Rename structure console_pdata into stm32_uart_pdata as it will be exported over the platform and should not use such a generic naming.
Thi
stm32_uart: rename exported structure and add secure flag
Rename structure console_pdata into stm32_uart_pdata as it will be exported over the platform and should not use such a generic naming.
This change adds a secure flag to the UART device instance for used to get the appropriate virtual address when required. An UART bus could be used by the secure world in secure mode or in non-secure mode. A bus to a secure element likely mandates secure hardening of the UART. A debug console over a non-secure UART link may require the UART resources to be assigned to the non-secure world.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Joakim Bech <joakim.bech@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
391d677e |
| 17-Dec-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_uart: timeout to escape waiting loops
Add a timeout in output console waiting loops. This is useful if the secure world relies on a non-secure UART that may be suspended or disabled from the n
stm32_uart: timeout to escape waiting loops
Add a timeout in output console waiting loops. This is useful if the secure world relies on a non-secure UART that may be suspended or disabled from the non-secure world.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
0a16c8ca |
| 19-Jun-2018 |
Etienne Carriere <etienne.carriere@st.com> |
core: stm32_uart driver
Used by platform stm32mp1.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <je
core: stm32_uart driver
Used by platform stm32mp1.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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