History log of /optee_os/core/arch/arm/plat-stm32mp1/plat_tzc400.c (Results 1 – 6 of 6)
Revision Date Author Comments
# 35a04c15 01-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp1: update the plat_tzc400 driver to support device tree

Add the usage of device tree memory regions defined to configure the
TZC400 firewall controller.

Signed-off-by: Gatien Chevallier

plat-stm32mp1: update the plat_tzc400 driver to support device tree

Add the usage of device tree memory regions defined to configure the
TZC400 firewall controller.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 2495ef3b 24-Nov-2023 Etienne Carriere <etienne.carriere@foss.st.com>

plat-stm32mp1: fix warning trace on TZC configuration check

Fix build warning reported by recent toolchains when TZDRAM
memory ends at the UINT32_MAX. This happends for example when
building for the

plat-stm32mp1: fix warning trace on TZC configuration check

Fix build warning reported by recent toolchains when TZDRAM
memory ends at the UINT32_MAX. This happends for example when
building for the stm32mp1-157C_EV1 platform. In such case was GCC
to emit the following warning trace:

core/arch/arm/plat-stm32mp1/plat_tzc400.c: In function ‘init_stm32mp1_tzc’:
core/arch/arm/plat-stm32mp1/plat_tzc400.c:107:61: warning: conversion from ‘uint64_t’ {aka ‘long long unsigned int’} to ‘vaddr_t’ {aka ‘long unsigned int’} changes value from ‘4294967296’ to ‘0’ [-Woverflow]
107 | if (!tzc_region_is_non_secure(region_index, tzdram_end,
| ^~~~~~~~~~

Fixes: 59c253f92c6c ("plat-stm32mp1: check TZC400 configuration")
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# f406e0d7 07-May-2023 Etienne Carriere <etienne.carriere@foss.st.com>

plat-stm32mp1: upgrade to new interrupt framework

Moves plat-stm32mp1 to the new interrupt framework API functions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Ca

plat-stm32mp1: upgrade to new interrupt framework

Moves plat-stm32mp1 to the new interrupt framework API functions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 200aed24 06-Jul-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp1: tzc400: support STM32MP13

On STM32MP13 platforms, there is only one TZC filter unit.
Therefore, differentiate the TZC_FILTERS_MASK from the STM32MP15,
which has two.

Signed-off-by: G

plat-stm32mp1: tzc400: support STM32MP13

On STM32MP13 platforms, there is only one TZC filter unit.
Therefore, differentiate the TZC_FILTERS_MASK from the STM32MP15,
which has two.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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# c2e4eb43 23-May-2021 Anton Rybakov <a.rybakov@omp.ru>

core_mmu: fix phys_to_virt() to check length

phys_to_virt() function without length parameter doesn`t
always have ability to find the correct mapping for
requested physical address. This is because

core_mmu: fix phys_to_virt() to check length

phys_to_virt() function without length parameter doesn`t
always have ability to find the correct mapping for
requested physical address. This is because physical
address can be mapped in the same time in different virtual
regions with different length. So the first found region
which contains the requested physical address possibly
doesn`t have enough mapped data. This is fixed by adding
the length parameter to phys_to_virt() function. Length
parameter can be set to 1 if caller knows that requested
(pa + len) doesn`t cross mapping granule boundary.

core_mmu_get_va() and io_pa_or_va() functions now are
take length parameter too as they based on phys_to_virt()
in case of MMU enabled.

Signed-off-by: Anton Rybakov <a.rybakov@omp.ru>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)

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# 59c253f9 01-May-2020 Etienne Carriere <etienne.carriere@st.com>

plat-stm32mp1: check TZC400 configuration

Core checks TZC400 configuration during initialization to ensure
DDR firewall expectations are satisfied.

Signed-off-by: Etienne Carriere <etienne.carriere

plat-stm32mp1: check TZC400 configuration

Core checks TZC400 configuration during initialization to ensure
DDR firewall expectations are satisfied.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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