History log of /optee_os/core/arch/arm/kernel/vfp.c (Results 1 – 10 of 10)
Revision Date Author Comments
# 8e01b4b9 03-Oct-2018 Jens Wiklander <jens.wiklander@linaro.org>

core: arm32: fix saving vfp state

Prior to this patch TF-A in AArch32 didn't save the normal world VFP
data registers and thus always restored then as zeroes and causing
problems in normal world.

W

core: arm32: fix saving vfp state

Prior to this patch TF-A in AArch32 didn't save the normal world VFP
data registers and thus always restored then as zeroes and causing
problems in normal world.

With this patch if running with TF-A in AArch32 save the VFP state using
the same logic as in AArch64. Since TF-A saves and restores CPACR_EL1 we
cannot tell if normal world currently is using VFP or not so we have to
assume that it is and always save the VFP data registers if they are
about to be changed.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey AArch32)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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# b1d7375c 15-Dec-2017 Jerome Forissier <jerome.forissier@linaro.org>

Remove 'All rights reserved' from Linaro files

The text 'All rights reserved' is useless [1]. The Free Software
Foundation's REUSE Initiative best practices document [2] does not
contain these words

Remove 'All rights reserved' from Linaro files

The text 'All rights reserved' is useless [1]. The Free Software
Foundation's REUSE Initiative best practices document [2] does not
contain these words. Therefore, we can safely remove the text from the
files that are owned by Linaro.

Generated by:
spdxify.py --linaro-only --strip-arr optee_os/

Link: [1] https://en.wikipedia.org/wiki/All_rights_reserved
Link: [2] https://reuse.software/practices/
Link: [3] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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# 78b7c7c7 15-Dec-2017 Jerome Forissier <jerome.forissier@linaro.org>

Remove license notice from Linaro files

Now that we have added SPDX identifiers, we can safely remove the
verbose license text from the files that are owned by Linaro.

Generated by [1]:
spdxify.p

Remove license notice from Linaro files

Now that we have added SPDX identifiers, we can safely remove the
verbose license text from the files that are owned by Linaro.

Generated by [1]:
spdxify.py --linaro-only --strip-license-text optee_os/

Link: [1] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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# 1bb92983 15-Dec-2017 Jerome Forissier <jerome.forissier@linaro.org>

Add SPDX license identifiers

Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.

Generated by [2]:
spdxify.py --add-spdx optee_os/

The scancode tool [3] wa

Add SPDX license identifiers

Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.

Generated by [2]:
spdxify.py --add-spdx optee_os/

The scancode tool [3] was used to double check the license matching
code in the Python script. All the licenses detected by scancode are
either detected by spdxify.py, or have no SPDX identifier, or are false
matches.

Link: [1] https://spdx.org/licenses/
Link: [2] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Link: [3] https://github.com/nexB/scancode-toolkit
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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# 8ddf5a4e 23-Jul-2016 Etienne Carriere <etienne.carriere@linaro.org>

assert/panic: fix misuse of assert/panic

Currently implementation of macro assert() does not expand to a
no-op when NDEBUG is defined. This will be done in a later change.
Before that, fix misuses o

assert/panic: fix misuse of assert/panic

Currently implementation of macro assert() does not expand to a
no-op when NDEBUG is defined. This will be done in a later change.
Before that, fix misuses of assert() and TEE_ASSERT():
- Correct misplaced assert() that should panic() whatever NDEBUG.
- Correct misplaced TEE_ASSERT() that should simply assert().

Also cleanup many inclusions of "assert.h" and few calls of assert().

Signed-off-by: Jens Wiklander <jen.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (QEMU)

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# 0de9a5fb 11-Dec-2015 Jens Wiklander <jens.wiklander@linaro.org>

arm: add TA hard-float support

Adds support for hard-float in TAs. Hard-float is enabled by default for
all platforms which are capable, currently all. Soft-float is still
available if needed.

Revi

arm: add TA hard-float support

Adds support for hard-float in TAs. Hard-float is enabled by default for
all platforms which are capable, currently all. Soft-float is still
available if needed.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 3b6248ef 23-Nov-2015 Jens Wiklander <jens.wiklander@linaro.org>

arm64: isb after write to cpacr_el1

Add an isb after each write to cpacr_el1 to make sure the register
update has taken effect before next instruction.

Signed-off-by: Jens Wiklander <jens.wiklander

arm64: isb after write to cpacr_el1

Add an isb after each write to cpacr_el1 to make sure the register
update has taken effect before next instruction.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)

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# bc46c1c6 22-May-2015 Jerome Forissier <jerome.forissier@linaro.org>

arm64: add support for NEON/VFP in TEE core (CFG_WITH_VFP=y)

Implements the state preservation functions for the Advanced SIMD and
floating-point registers on AArch64. This is required to run floati

arm64: add support for NEON/VFP in TEE core (CFG_WITH_VFP=y)

Implements the state preservation functions for the Advanced SIMD and
floating-point registers on AArch64. This is required to run floating-
point, Advanced SIMD (a.k.a. NEON), or Cryptographic Extension
instructions in the TEE core.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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# 8b75a7eb 22-May-2015 Jerome Forissier <jerome.forissier@linaro.org>

Remove unused function vfp_is_vpfinstr()

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand

Remove unused function vfp_is_vpfinstr()

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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# abe38974 09-Mar-2015 Jens Wiklander <jens.wiklander@linaro.org>

Rename arm32 architecture to arm

Renames arm32 directories to arm.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by

Rename arm32 architecture to arm

Renames arm32 directories to arm.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (QEMU platform)

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