| #
ce44b9df |
| 19-Jan-2024 |
Jerome Forissier <jerome.forissier@linaro.org> |
ci: Rust updates
Now that [1] is merged, Rust tests are enabled by default for QEMUv8 and there is no need for a separate Rust job in CI, so remove it. On the other hand, a couple of fixes are neede
ci: Rust updates
Now that [1] is merged, Rust tests are enabled by default for QEMUv8 and there is no need for a separate Rust job in CI, so remove it. On the other hand, a couple of fixes are needed:
- Update PATH so that the cargo command (which is installed locally during the build of the Rust SDK) can be found.
- Disable Rust in the BTI+MTE+PAC test because the Rust examples fail to build with the supplied toolchain:
/usr/local/bin/../lib/gcc/aarch64-unknown-linux-uclibc/12.2.0/../../../../aarch64-unknown-linux-uclibc/bin/ld.bfd: /tmp/rustcmQty55/libcompiler_builtins-76fca0633b54e12b.rlib(45c91108d938afe8-cpu_model.o): in function `init_have_lse_atomics': /cargo/registry/src/index.crates.io-6f17d22bba15001f/compiler_builtins-0.1.101/./lib/builtins/cpu_model.c:1075: undefined reference to `getauxval' ...
- Also disable Rust in the test that enables ftrace, because the signature_verification-rs command just hangs in this configuration.
Link: https://github.com/OP-TEE/build/pull/717 [1] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
f11639b2 |
| 23-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
ci: build stm32mp1-135F_DK with Clang
Adds a build of stm32mp1-135F_DK platform with Clang to ensure the several driver frameworks enabled by this platform comply with a Clang build.
Acked-by: Jens
ci: build stm32mp1-135F_DK with Clang
Adds a build of stm32mp1-135F_DK platform with Clang to ensure the several driver frameworks enabled by this platform comply with a Clang build.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
d07ddf93 |
| 21-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
ci: enable CFG_DRIVERS_REGULATOR_PRINT_TREE for stm32mp1-135F_DK build
Enables CFG_DRIVERS_REGULATOR_PRINT_TREE when building stm32mp1-135F_DK.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.o
ci: enable CFG_DRIVERS_REGULATOR_PRINT_TREE for stm32mp1-135F_DK build
Enables CFG_DRIVERS_REGULATOR_PRINT_TREE when building stm32mp1-135F_DK.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
c25f5007 |
| 18-Nov-2023 |
loubaihui <loubaihui1@huawei.com> |
ci.yml: adds a PLATFORM=d06 command
Add a _make PLATFORM=d06 command.
Signed-off-by: loubaihui <loubaihui1@huawei.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
f1318653 |
| 22-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
ci: sync SCP-firmware on v2.13.0 release tag
Synchronize SCP-firmware Git repository revision on v2.13.0 release tag to avoid issues with latest merged changes in SCP-firmware that OP-TEE OS may not
ci: sync SCP-firmware on v2.13.0 release tag
Synchronize SCP-firmware Git repository revision on v2.13.0 release tag to avoid issues with latest merged changes in SCP-firmware that OP-TEE OS may not be compliant with.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
33ab8821 |
| 21-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
ci: enable CFG_DRIVERS_CLK_PRINT_TREE for stm32mp1-135F_DK build
Enables CFG_DRIVERS_CLK_PRINT_TREE when building stm32mp1-135F_DK.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signe
ci: enable CFG_DRIVERS_CLK_PRINT_TREE for stm32mp1-135F_DK build
Enables CFG_DRIVERS_CLK_PRINT_TREE when building stm32mp1-135F_DK.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
8bf10029 |
| 07-Nov-2023 |
Raymond Mao <raymond.mao@linaro.org> |
ci: vexpress-qemu_armv8a: add transfer list build
Add CI multi-platform build with CFG_TRANSFER_LIST
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Acked-by: Etienne Carriere <etienne.carriere
ci: vexpress-qemu_armv8a: add transfer list build
Add CI multi-platform build with CFG_TRANSFER_LIST
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
76438b80 |
| 30-Oct-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
ci: add STM32MP2x platforms default build
Adds STM32MP2x platform default build to the CI.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.ca
ci: add STM32MP2x platforms default build
Adds STM32MP2x platform default build to the CI.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
37f820d6 |
| 31-Oct-2023 |
Clement Faure <clement.faure@nxp.com> |
ci: build imx-mx8dxmek
Add imx-mx8dxmek to CI build.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
a03aafed |
| 11-Oct-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
ci: hafnium: fix "no space left on device" error
Apply the same technique as commit 788069fa88ed ("ci: rust: fix "no space left in device" error") to avoid a similar issue with the Hafnium job.
Sig
ci: hafnium: fix "no space left on device" error
Apply the same technique as commit 788069fa88ed ("ci: rust: fix "no space left in device" error") to avoid a similar issue with the Hafnium job.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
e57b52dd |
| 10-Oct-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
ci: rust: remove build workaround
Since [1] there is no need to build without OPTEE_RUST_ENABLE=y. Remove the temporary fix.
Link: https://github.com/OP-TEE/build/commit/dfc1f8f492f3efbaa9b9a4c64a0
ci: rust: remove build workaround
Since [1] there is no need to build without OPTEE_RUST_ENABLE=y. Remove the temporary fix.
Link: https://github.com/OP-TEE/build/commit/dfc1f8f492f3efbaa9b9a4c64a0345084dbd851b [1] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
788069fa |
| 10-Oct-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
ci: rust: fix "no space left in device" error
Remove the content of /__t before starting the QEMUv8_check_rust job. This directory contains things we do not need:
# du -s /__t/* | sort -n -r | hea
ci: rust: fix "no space left in device" error
Remove the content of /__t before starting the QEMUv8_check_rust job. This directory contains things we do not need:
# du -s /__t/* | sort -n -r | head -n 10 8651892 /__t/CodeQL 1246592 /__t/Python 1015800 /__t/go 668520 /__t/PyPy 560996 /__t/node 63188 /__t/Ruby 16 /__t/Java_Temurin-Hotspot_jdk
Deleting these files saves 11G of disk space in the root directory:
$ diff -u df-h_before df-h_after [...] Filesystem Size Used Avail Use% Mounted on -overlay 84G 67G 17G 81% / +overlay 84G 56G 28G 67% / tmpfs 64M 0 64M 0% /dev shm 64M 0 64M 0% /dev/shm -/dev/root 84G 67G 17G 81% /__w +/dev/root 84G 56G 28G 67% /__w tmpfs 1.4G 1.2M 1.4G 1% /run/docker.sock tmpfs 3.4G 0 3.4G 0% /proc/acpi tmpfs 3.4G 0 3.4G 0% /proc/scsi
This fixes the "no space left on device" errors that appeared recently when running the job.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
de80c329 |
| 04-Oct-2023 |
Thomas Perrot <thomas.perrot@bootlin.com> |
ci: build sam-sama5d2_xplained
Adds platform sam-sama5d2_xplained to CI build.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| #
4cc1b64d |
| 04-Oct-2023 |
Thomas Perrot <thomas.perrot@bootlin.com> |
ci: build sam-sama5d27_som1_ek
Adds platform sam-sama5d27_som1_ek to CI build
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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| #
9115cdfa |
| 02-Aug-2023 |
Gowthami <gthiagarajan@marvell.com> |
plat-marvell: Add support for CN10K SoCs
Add support for CN10K SoCs from Marvell.
Only tested 64-bit mode with default configurations:
1. Build command make PLATFORM=marvell-cn10ka 2. Pass
plat-marvell: Add support for CN10K SoCs
Add support for CN10K SoCs from Marvell.
Only tested 64-bit mode with default configurations:
1. Build command make PLATFORM=marvell-cn10ka 2. Passed xtest
Signed-off-by: Gowthami <gthiagarajan@marvell.com> Reviewed-by: Anil Kumar Reddy <areddy3@marvell.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
1188e423 |
| 18-Aug-2023 |
Nicola Mazzucato <nicola.mazzucato@arm.com> |
ci.yml: Reintroduce build of libscmi-server
A previous patch temporarily removed the libscmi-server build.
Now that the related PR in SCP-firmware has been merged, reintroduce the build step.
Link
ci.yml: Reintroduce build of libscmi-server
A previous patch temporarily removed the libscmi-server build.
Now that the related PR in SCP-firmware has been merged, reintroduce the build step.
Link: https://github.com/ARM-software/SCP-firmware/pull/812 Link: https://github.com/OP-TEE/optee_os/pull/6190
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>
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| #
83d0edee |
| 25-Aug-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: asan: KASAN and ASLR are incompatible
The address sanitizer shadow offset address is given at compile time (CFG_ASAN_SHADOW_OFFSET) and is hard-coded by the compiler into the prologue of instr
core: asan: KASAN and ASLR are incompatible
The address sanitizer shadow offset address is given at compile time (CFG_ASAN_SHADOW_OFFSET) and is hard-coded by the compiler into the prologue of instrumented functions, for the purpose of initializing the shadow area for the stack (local variables). With ASLR turned on, this offset becomes invalid because of the random ASLR offset.
For KASAN to work with ASLR, we would need to either keep the shadow area at the expected offset (which may not be very easy, I have not investigated in more details) or provide the shadow offset dynamically. An attempt was made three years ago to extend the GCC compiler with such a feature [1] but there was no feedback from the maintainers [2].
Add a check in mk/config.mk so that KASAN and ASLR may not be enabled simultaneously.
Link: https://blogs.coreboot.org/blog/2020/08/31/gsoc-address-sanitizer-wrap-up/ [1] Link: https://gcc.gnu.org/pipermail/gcc-patches/2020-July/550176.html [2] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
3427eb2a |
| 02-Aug-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
ci: qemuv8: add check Hafnium
Adds a check with Hafnium, that is, testing with Hafnium as SPMC at S-EL2 and OP-TEE as an SP at S-EL1. Building with SPMC_AT_EL=2.
Signed-off-by: Jens Wiklander <jens
ci: qemuv8: add check Hafnium
Adds a check with Hafnium, that is, testing with Hafnium as SPMC at S-EL2 and OP-TEE as an SP at S-EL1. Building with SPMC_AT_EL=2.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
40be56c9 |
| 26-Jul-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
ci: QEMUv8_check: enable attestation PTA
Enables the attestation PTA for all configurations in the QEMU_v8 job. This would have caught the issue fixed by the parent commit.
Signed-off-by: Jerome Fo
ci: QEMUv8_check: enable attestation PTA
Enables the attestation PTA for all configurations in the QEMU_v8 job. This would have caught the issue fixed by the parent commit.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
5cc24a60 |
| 08-Aug-2023 |
Nicola Mazzucato <nicola.mazzucato@arm.com> |
ci.yml: Temporarily don't build libscmi-server
PR812 in SCP-firmware [1] has added some source files into mod_scmi_perf directory, but it currently fails when building for the optee-os case. This is
ci.yml: Temporarily don't build libscmi-server
PR812 in SCP-firmware [1] has added some source files into mod_scmi_perf directory, but it currently fails when building for the optee-os case. This is due to the fact that the current build system in optee, for building the scmi-server fetched from SCP-firmware codebase, works well under the assumption that only one source file is required.
To unlock the circular dependency between build systems and source codes, temporarily remove the build for the scmi-server.
This will allow the following two patches to be safely merged into the optee_os repo: core: scmi-server: Add support for conditional options for SCMI-Perf optee-fvp: Enable CFG_SCPFW_SCMI_PERF_PROTOCOL_OPS
Subsequently, PR812 in SCP-firmware can be merged, and immediately a revert patch for this present one will follow to reintroduce the libscmi-server build.
Link: https://github.com/ARM-software/SCP-firmware/pull/812 [1] Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>
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| #
a012b992 |
| 28-Jun-2023 |
Seonghyun Park <seonghp@amazon.com> |
ci: qemuv8: add check with PAN enabled
Update CI to check with PAN enabled as well. This check will help to ensure that new commits also use user-access functions properly.
Signed-off-by: Seonghyun
ci: qemuv8: add check with PAN enabled
Update CI to check with PAN enabled as well. This check will help to ensure that new commits also use user-access functions properly.
Signed-off-by: Seonghyun Park <seonghp@amazon.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
28a029b5 |
| 23-May-2023 |
Margarita Glushkin <rutigl@gmail.com> |
core: add plat-nuvoton
Adds support to Nuvoton npcm845x
Co-developed-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-
core: add plat-nuvoton
Adds support to Nuvoton npcm845x
Co-developed-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-by: Margarita Glushkin <rutigl@gmail.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
faef0dd6 |
| 02-Feb-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
ci: build CFG_CORE_SEL1_SPMC=y CFG_NS_VIRTUALIZATION=y
Add a build with both CFG_CORE_SEL1_SPMC=y and CFG_NS_VIRTUALIZATION=y.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off
ci: build CFG_CORE_SEL1_SPMC=y CFG_NS_VIRTUALIZATION=y
Add a build with both CFG_CORE_SEL1_SPMC=y and CFG_NS_VIRTUALIZATION=y.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
3ce90223 |
| 11-Apr-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
ci: add build with SPMC at S-EL2 and relocatable
Adds a build with CFG_CORE_SEL2_SPMC=y and CFG_CORE_PHYS_RELOCATABLE=y. Dummy values are needed for CFG_TZDRAM_START and CFG_TZDRAM_SIZE since vexpre
ci: add build with SPMC at S-EL2 and relocatable
Adds a build with CFG_CORE_SEL2_SPMC=y and CFG_CORE_PHYS_RELOCATABLE=y. Dummy values are needed for CFG_TZDRAM_START and CFG_TZDRAM_SIZE since vexpress-qemu_armv8a doesn't have default values for those in this configuration.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
497c6876 |
| 17-Apr-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
ci: qemuv8: enable core ftrace
Update CI to enable function tracing in the TEE core on QEMUv8 to make sure that no annotion disabling function instrumentation (__noprof) is missing. Only one test is
ci: qemuv8: enable core ftrace
Update CI to enable function tracing in the TEE core on QEMUv8 to make sure that no annotion disabling function instrumentation (__noprof) is missing. Only one test is enabled because the whole test suite takes too long to execute with instrumentation enabled, and running more test cases is unlikely to uncover more bugs because this is mostly about low level functions (thread handling...).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
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